RAS/AMD/ATL: Fix bit overflow in denorm_addr_df4_np2()

The hash_pa8 and hashed_bit values in denorm_addr_df4_np2() are
currently defined as u8 types. These variables represent single bits.

'hash_pa8' is set based on logical AND operations using masks with more
than 8 bits. So the calculated value will not fit in this variable. It
will always be '0'. The 'hash_pa8' check later in the function will fail
which produces incorrect results for some cases.

Change these variables to bool type. This clarifies that they are
single bit values. Also, this allows the compiler to ensure they hold
the proper results. Remove an unnecessary shift operation.

  [ bp: Remove the unnecessary brackets in the else-branch of the
        hash_pa8 assignment. ]

Fixes: 3f317499 ("RAS: Introduce AMD Address Translation Library")
Signed-off-by: Yazen Ghannam <yazen.ghannam@amd.com>
Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20240222165449.23582-1-yazen.ghannam@amd.com

drivers/ras/amd/atl/denormalize.c

@@ -545,7 +545,7 @@ static int denorm_addr_df4_np2(struct addr_ctx *ctx)
 	unsigned int mod_value, shift_value;
 	u16 mask = df_cfg.component_id_mask;
 	u64 temp_addr_a, temp_addr_b;
-	u8 hash_pa8, hashed_bit;
+	bool hash_pa8, hashed_bit;
 
 	switch (ctx->map.intlv_mode) {
 	case DF4_NPS4_3CHAN_HASH:
@@ -577,8 +577,7 @@ static int denorm_addr_df4_np2(struct addr_ctx *ctx)
 		hash_pa8	= BIT_ULL(shift_value) & ctx->ret_addr;
 		temp_addr_a	= remove_bits(shift_value, shift_value, ctx->ret_addr);
 	} else {
-		hash_pa8	= (ctx->coh_st_fabric_id & df_cfg.socket_id_mask);
-		hash_pa8	>>= df_cfg.socket_id_shift;
+		hash_pa8	= ctx->coh_st_fabric_id & df_cfg.socket_id_mask;
 		temp_addr_a	= ctx->ret_addr;
 	}