Commit ddbfff74 authored by Aleksandar Markovic's avatar Aleksandar Markovic Committed by Ralf Baechle

MIPS: math-emu: Handle zero accumulator case in MADDF and MSUBF separately

If accumulator value is zero, just return the value of previously
calculated product. This brings logic in MADDF/MSUBF implementation
closer to the logic in ADD/SUB case.
Signed-off-by: default avatarMiodrag Dinic <miodrag.dinic@imgtec.com>
Signed-off-by: default avatarGoran Ferenc <goran.ferenc@imgtec.com>
Signed-off-by: default avatarAleksandar Markovic <aleksandar.markovic@imgtec.com>
Cc: James.Hogan@imgtec.com
Cc: Paul.Burton@imgtec.com
Cc: Raghu.Gandham@imgtec.com
Cc: Leonid.Yegoshin@imgtec.com
Cc: Douglas.Leung@imgtec.com
Cc: Petar.Jovanovic@imgtec.com
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/16512/Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 25d8b92e
...@@ -54,7 +54,7 @@ static union ieee754dp _dp_maddf(union ieee754dp z, union ieee754dp x, ...@@ -54,7 +54,7 @@ static union ieee754dp _dp_maddf(union ieee754dp z, union ieee754dp x,
return ieee754dp_nanxcpt(z); return ieee754dp_nanxcpt(z);
case IEEE754_CLASS_DNORM: case IEEE754_CLASS_DNORM:
DPDNORMZ; DPDNORMZ;
/* QNAN is handled separately below */ /* QNAN and ZERO cases are handled separately below */
} }
switch (CLPAIR(xc, yc)) { switch (CLPAIR(xc, yc)) {
...@@ -210,6 +210,9 @@ static union ieee754dp _dp_maddf(union ieee754dp z, union ieee754dp x, ...@@ -210,6 +210,9 @@ static union ieee754dp _dp_maddf(union ieee754dp z, union ieee754dp x,
} }
assert(rm & (DP_HIDDEN_BIT << 3)); assert(rm & (DP_HIDDEN_BIT << 3));
if (zc == IEEE754_CLASS_ZERO)
return ieee754dp_format(rs, re, rm);
/* And now the addition */ /* And now the addition */
assert(zm & DP_HIDDEN_BIT); assert(zm & DP_HIDDEN_BIT);
......
...@@ -54,7 +54,7 @@ static union ieee754sp _sp_maddf(union ieee754sp z, union ieee754sp x, ...@@ -54,7 +54,7 @@ static union ieee754sp _sp_maddf(union ieee754sp z, union ieee754sp x,
return ieee754sp_nanxcpt(z); return ieee754sp_nanxcpt(z);
case IEEE754_CLASS_DNORM: case IEEE754_CLASS_DNORM:
SPDNORMZ; SPDNORMZ;
/* QNAN is handled separately below */ /* QNAN and ZERO cases are handled separately below */
} }
switch (CLPAIR(xc, yc)) { switch (CLPAIR(xc, yc)) {
...@@ -203,6 +203,9 @@ static union ieee754sp _sp_maddf(union ieee754sp z, union ieee754sp x, ...@@ -203,6 +203,9 @@ static union ieee754sp _sp_maddf(union ieee754sp z, union ieee754sp x,
} }
assert(rm & (SP_HIDDEN_BIT << 3)); assert(rm & (SP_HIDDEN_BIT << 3));
if (zc == IEEE754_CLASS_ZERO)
return ieee754sp_format(rs, re, rm);
/* And now the addition */ /* And now the addition */
assert(zm & SP_HIDDEN_BIT); assert(zm & SP_HIDDEN_BIT);
......
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