Commit de76cc2b authored by Hans Petter Selasky's avatar Hans Petter Selasky Committed by Greg Kroah-Hartman

musb_gadget: Fix for spurious interrupts on endpoint zero.

There is a multi-year old bug in the MUSB hardware which is not documented.
It causes spurious interrupts and have various symptoms, like endless
"SetupEnd came in a wrong ep0stage" messages. The fix is taken from the
FreeBSD's musb driver.

How to reproduce:
For example issue clear-stall on a couple of endpoints very fast,
like one request per 125us. After a while the bug triggers and the
musb-chip becomes unusable until next re-enumeration.
Signed-off-by: default avatarHans Petter Selasky <hps@bitfrost.no>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent c5a48592
...@@ -679,6 +679,14 @@ irqreturn_t musb_g_ep0_irq(struct musb *musb) ...@@ -679,6 +679,14 @@ irqreturn_t musb_g_ep0_irq(struct musb *musb)
musb_readb(mbase, MUSB_FADDR), musb_readb(mbase, MUSB_FADDR),
decode_ep0stage(musb->ep0_state)); decode_ep0stage(musb->ep0_state));
if (csr & MUSB_CSR0_P_DATAEND) {
/*
* If DATAEND is set we should not call the callback,
* hence the status stage is not complete.
*/
return IRQ_HANDLED;
}
/* I sent a stall.. need to acknowledge it now.. */ /* I sent a stall.. need to acknowledge it now.. */
if (csr & MUSB_CSR0_P_SENTSTALL) { if (csr & MUSB_CSR0_P_SENTSTALL) {
musb_writew(regs, MUSB_CSR0, musb_writew(regs, MUSB_CSR0,
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment