Commit deac150c authored by Shinobu Uehara's avatar Shinobu Uehara Committed by Simon Horman

ARM: shmobile: r8a7794: Add MMCIF clock to device tree

Signed-off-by: default avatarShinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: omitted device node; only add clock]
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 8e181633
...@@ -308,6 +308,13 @@ sd2_clk: sd3_clk@e615007c { ...@@ -308,6 +308,13 @@ sd2_clk: sd3_clk@e615007c {
#clock-cells = <0>; #clock-cells = <0>;
clock-output-names = "sd2"; clock-output-names = "sd2";
}; };
mmc0_clk: mmc0_clk@e6150240 {
compatible = "renesas,r8a7794-div6-clock", "renesas,cpg-div6-clock";
reg = <0 0xe6150240 0 4>;
clocks = <&pll1_div2_clk>;
#clock-cells = <0>;
clock-output-names = "mmc0";
};
/* Fixed factor clocks */ /* Fixed factor clocks */
pll1_div2_clk: pll1_div2_clk { pll1_div2_clk: pll1_div2_clk {
...@@ -512,16 +519,16 @@ mstp3_clks: mstp3_clks@e615013c { ...@@ -512,16 +519,16 @@ mstp3_clks: mstp3_clks@e615013c {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>, clocks = <&sd2_clk>, <&sd1_clk>, <&cpg_clocks R8A7794_CLK_SD0>,
<&rclk_clk>, <&hp_clk>, <&hp_clk>; <&mmc0_clk>, <&rclk_clk>, <&hp_clk>, <&hp_clk>;
#clock-cells = <1>; #clock-cells = <1>;
clock-indices = < clock-indices = <
R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0 R8A7794_CLK_SDHI2 R8A7794_CLK_SDHI1 R8A7794_CLK_SDHI0
R8A7794_CLK_CMT1 R8A7794_CLK_USBDMAC0 R8A7794_CLK_MMCIF0 R8A7794_CLK_CMT1
R8A7794_CLK_USBDMAC1 R8A7794_CLK_USBDMAC0 R8A7794_CLK_USBDMAC1
>; >;
clock-output-names = clock-output-names =
"sdhi2", "sdhi1", "sdhi0", "sdhi2", "sdhi1", "sdhi0",
"cmt1", "usbdmac0", "usbdmac1"; "mmcif0", "cmt1", "usbdmac0", "usbdmac1";
}; };
mstp7_clks: mstp7_clks@e615014c { mstp7_clks: mstp7_clks@e615014c {
compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7794-mstp-clocks", "renesas,cpg-mstp-clocks";
......
...@@ -55,6 +55,7 @@ ...@@ -55,6 +55,7 @@
#define R8A7794_CLK_SDHI2 11 #define R8A7794_CLK_SDHI2 11
#define R8A7794_CLK_SDHI1 12 #define R8A7794_CLK_SDHI1 12
#define R8A7794_CLK_SDHI0 14 #define R8A7794_CLK_SDHI0 14
#define R8A7794_CLK_MMCIF0 15
#define R8A7794_CLK_CMT1 29 #define R8A7794_CLK_CMT1 29
#define R8A7794_CLK_USBDMAC0 30 #define R8A7794_CLK_USBDMAC0 30
#define R8A7794_CLK_USBDMAC1 31 #define R8A7794_CLK_USBDMAC1 31
......
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