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Commit e0b4b472 authored by Leon Romanovsky's avatar Leon Romanovsky
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net/mlx5: Update transobj.c new cmd interface 

Do mass update of transobj.c to reuse newly introduced
mlx5_cmd_exec_in*() interfaces.
Signed-off-by: default avatarLeon Romanovsky <leonro@mellanox.com>
parent 7ba294e4
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Showing with 85 additions and 131 deletions
drivers/infiniband/hw/mlx5/qp.c
View file @ e0b4b472
...@@ -1255,7 +1255,7 @@ static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, ...@@ -1255,7 +1255,7 @@ static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
struct mlx5_ib_sq *sq, u32 tdn, struct mlx5_ib_sq *sq, u32 tdn,
struct ib_pd *pd) struct ib_pd *pd)
{ {
u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {0}; u32 in[MLX5_ST_SZ_DW(create_tis_in)] = {};
void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx); void *tisc = MLX5_ADDR_OF(create_tis_in, in, ctx);
MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid); MLX5_SET(create_tis_in, in, uid, to_mpd(pd)->uid);
...@@ -1263,7 +1263,7 @@ static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev, ...@@ -1263,7 +1263,7 @@ static int create_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
if (qp->flags & MLX5_IB_QP_UNDERLAY) if (qp->flags & MLX5_IB_QP_UNDERLAY)
MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn); MLX5_SET(tisc, tisc, underlay_qpn, qp->underlay_qpn);
return mlx5_core_create_tis(dev->mdev, in, sizeof(in), &sq->tisn); return mlx5_core_create_tis(dev->mdev, in, &sq->tisn);
} }
static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev, static void destroy_raw_packet_qp_tis(struct mlx5_ib_dev *dev,
...@@ -1460,9 +1460,8 @@ static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev, ...@@ -1460,9 +1460,8 @@ static void destroy_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
struct mlx5_ib_rq *rq, u32 tdn, struct mlx5_ib_rq *rq, u32 tdn,
u32 *qp_flags_en, u32 *qp_flags_en, struct ib_pd *pd,
struct ib_pd *pd, u32 *out)
u32 *out, int outlen)
{ {
u8 lb_flag = 0; u8 lb_flag = 0;
u32 *in; u32 *in;
...@@ -1495,9 +1494,8 @@ static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev, ...@@ -1495,9 +1494,8 @@ static int create_raw_packet_qp_tir(struct mlx5_ib_dev *dev,
} }
MLX5_SET(tirc, tirc, self_lb_block, lb_flag); MLX5_SET(tirc, tirc, self_lb_block, lb_flag);
MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR);
err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen); err = mlx5_cmd_exec_inout(dev->mdev, create_tir, in, out);
rq->tirn = MLX5_GET(create_tir_out, out, tirn); rq->tirn = MLX5_GET(create_tir_out, out, tirn);
if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { if (!err && MLX5_GET(tirc, tirc, self_lb_block)) {
err = mlx5_ib_enable_lb(dev, false, true); err = mlx5_ib_enable_lb(dev, false, true);
...@@ -1557,9 +1555,8 @@ static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, ...@@ -1557,9 +1555,8 @@ static int create_raw_packet_qp(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
if (err) if (err)
goto err_destroy_sq; goto err_destroy_sq;
err = create_raw_packet_qp_tir( err = create_raw_packet_qp_tir(dev, rq, tdn, &qp->flags_en, pd,
dev, rq, tdn, &qp->flags_en, pd, out, out);
MLX5_ST_SZ_BYTES(create_tir_out));
if (err) if (err)
goto err_destroy_rq; goto err_destroy_rq;
...@@ -1854,7 +1851,8 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp, ...@@ -1854,7 +1851,8 @@ static int create_rss_raw_qp_tir(struct mlx5_ib_dev *dev, struct mlx5_ib_qp *qp,
MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields); MLX5_SET(rx_hash_field_select, hfso, selected_fields, selected_fields);
create_tir: create_tir:
err = mlx5_core_create_tir_out(dev->mdev, in, inlen, out, outlen); MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR);
err = mlx5_cmd_exec_inout(dev->mdev, create_tir, in, out);
qp->rss_qp.tirn = MLX5_GET(create_tir_out, out, tirn); qp->rss_qp.tirn = MLX5_GET(create_tir_out, out, tirn);
if (!err && MLX5_GET(tirc, tirc, self_lb_block)) { if (!err && MLX5_GET(tirc, tirc, self_lb_block)) {
...@@ -2933,7 +2931,7 @@ static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev, ...@@ -2933,7 +2931,7 @@ static int modify_raw_packet_eth_prio(struct mlx5_core_dev *dev,
tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx);
MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1)); MLX5_SET(tisc, tisc, prio, ((sl & 0x7) << 1));
err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); err = mlx5_core_modify_tis(dev, sq->tisn, in);
kvfree(in); kvfree(in);
...@@ -2960,7 +2958,7 @@ static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev, ...@@ -2960,7 +2958,7 @@ static int modify_raw_packet_tx_affinity(struct mlx5_core_dev *dev,
tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx); tisc = MLX5_ADDR_OF(modify_tis_in, in, ctx);
MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity); MLX5_SET(tisc, tisc, lag_tx_port_affinity, tx_affinity);
err = mlx5_core_modify_tis(dev, sq->tisn, in, inlen); err = mlx5_core_modify_tis(dev, sq->tisn, in);
kvfree(in); kvfree(in);
...@@ -3240,7 +3238,7 @@ static int modify_raw_packet_qp_rq( ...@@ -3240,7 +3238,7 @@ static int modify_raw_packet_qp_rq(
"RAW PACKET QP counters are not supported on current FW\n"); "RAW PACKET QP counters are not supported on current FW\n");
} }
err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in, inlen); err = mlx5_core_modify_rq(dev->mdev, rq->base.mqp.qpn, in);
if (err) if (err)
goto out; goto out;
...@@ -3303,7 +3301,7 @@ static int modify_raw_packet_qp_sq( ...@@ -3303,7 +3301,7 @@ static int modify_raw_packet_qp_sq(
MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index); MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, rl_index);
} }
err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in, inlen); err = mlx5_core_modify_sq(dev, sq->base.mqp.qpn, in);
if (err) { if (err) {
/* Remove new rate from table if failed */ /* Remove new rate from table if failed */
if (new_rate_added) if (new_rate_added)
...@@ -6444,7 +6442,7 @@ int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr, ...@@ -6444,7 +6442,7 @@ int mlx5_ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
"Receive WQ counters are not supported on current FW\n"); "Receive WQ counters are not supported on current FW\n");
} }
err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in, inlen); err = mlx5_core_modify_rq(dev->mdev, rwq->core_qp.qpn, in);
if (!err) if (!err)
rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state; rwq->ibwq.state = (wq_state == MLX5_RQC_STATE_ERR) ? IB_WQS_ERR : wq_state;
......
drivers/net/ethernet/mellanox/mlx5/core/en.h
View file @ e0b4b472
...@@ -1012,7 +1012,7 @@ int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz, ...@@ -1012,7 +1012,7 @@ int mlx5e_redirect_rqt(struct mlx5e_priv *priv, u32 rqtn, int sz,
void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_rss_params *rss_params, void mlx5e_build_indir_tir_ctx_hash(struct mlx5e_rss_params *rss_params,
const struct mlx5e_tirc_config *ttconfig, const struct mlx5e_tirc_config *ttconfig,
void *tirc, bool inner); void *tirc, bool inner);
void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen); void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in);
struct mlx5e_tirc_config mlx5e_tirc_get_default_config(enum mlx5e_traffic_types tt); struct mlx5e_tirc_config mlx5e_tirc_get_default_config(enum mlx5e_traffic_types tt);
struct mlx5e_xsk_param; struct mlx5e_xsk_param;
...@@ -1102,8 +1102,8 @@ void mlx5e_dcbnl_init_app(struct mlx5e_priv *priv); ...@@ -1102,8 +1102,8 @@ void mlx5e_dcbnl_init_app(struct mlx5e_priv *priv);
void mlx5e_dcbnl_delete_app(struct mlx5e_priv *priv); void mlx5e_dcbnl_delete_app(struct mlx5e_priv *priv);
#endif #endif
int mlx5e_create_tir(struct mlx5_core_dev *mdev, int mlx5e_create_tir(struct mlx5_core_dev *mdev, struct mlx5e_tir *tir,
struct mlx5e_tir *tir, u32 *in, int inlen); u32 *in);
void mlx5e_destroy_tir(struct mlx5_core_dev *mdev, void mlx5e_destroy_tir(struct mlx5_core_dev *mdev,
struct mlx5e_tir *tir); struct mlx5e_tir *tir);
int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev); int mlx5e_create_mdev_resources(struct mlx5_core_dev *mdev);
......
drivers/net/ethernet/mellanox/mlx5/core/en_common.c
View file @ e0b4b472
...@@ -36,12 +36,11 @@ ...@@ -36,12 +36,11 @@
* Global resources are common to all the netdevices crated on the same nic. * Global resources are common to all the netdevices crated on the same nic.
*/ */
int mlx5e_create_tir(struct mlx5_core_dev *mdev, int mlx5e_create_tir(struct mlx5_core_dev *mdev, struct mlx5e_tir *tir, u32 *in)
struct mlx5e_tir *tir, u32 *in, int inlen)
{ {
int err; int err;
err = mlx5_core_create_tir(mdev, in, inlen, &tir->tirn); err = mlx5_core_create_tir(mdev, in, &tir->tirn);
if (err) if (err)
return err; return err;
...@@ -167,7 +166,7 @@ int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb) ...@@ -167,7 +166,7 @@ int mlx5e_refresh_tirs(struct mlx5e_priv *priv, bool enable_uc_lb)
mutex_lock(&mdev->mlx5e_res.td.list_lock); mutex_lock(&mdev->mlx5e_res.td.list_lock);
list_for_each_entry(tir, &mdev->mlx5e_res.td.tirs_list, list) { list_for_each_entry(tir, &mdev->mlx5e_res.td.tirs_list, list) {
tirn = tir->tirn; tirn = tir->tirn;
err = mlx5_core_modify_tir(mdev, tirn, in, inlen); err = mlx5_core_modify_tir(mdev, tirn, in);
if (err) if (err)
goto out; goto out;
} }
......
drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c
View file @ e0b4b472
...@@ -1204,7 +1204,7 @@ int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir, ...@@ -1204,7 +1204,7 @@ int mlx5e_set_rxfh(struct net_device *dev, const u32 *indir,
} }
if (hash_changed) if (hash_changed)
mlx5e_modify_tirs_hash(priv, in, inlen); mlx5e_modify_tirs_hash(priv, in);
mutex_unlock(&priv->state_lock); mutex_unlock(&priv->state_lock);
......
drivers/net/ethernet/mellanox/mlx5/core/en_fs_ethtool.c
View file @ e0b4b472
...@@ -858,7 +858,7 @@ static int mlx5e_set_rss_hash_opt(struct mlx5e_priv *priv, ...@@ -858,7 +858,7 @@ static int mlx5e_set_rss_hash_opt(struct mlx5e_priv *priv,
goto out; goto out;
priv->rss_params.rx_hash_fields[tt] = rx_hash_field; priv->rss_params.rx_hash_fields[tt] = rx_hash_field;
mlx5e_modify_tirs_hash(priv, in, inlen); mlx5e_modify_tirs_hash(priv, in);
out: out:
mutex_unlock(&priv->state_lock); mutex_unlock(&priv->state_lock);
......
drivers/net/ethernet/mellanox/mlx5/core/en_main.c
View file @ e0b4b472
...@@ -721,7 +721,7 @@ int mlx5e_modify_rq_state(struct mlx5e_rq *rq, int curr_state, int next_state) ...@@ -721,7 +721,7 @@ int mlx5e_modify_rq_state(struct mlx5e_rq *rq, int curr_state, int next_state)
MLX5_SET(modify_rq_in, in, rq_state, curr_state); MLX5_SET(modify_rq_in, in, rq_state, curr_state);
MLX5_SET(rqc, rqc, state, next_state); MLX5_SET(rqc, rqc, state, next_state);
err = mlx5_core_modify_rq(mdev, rq->rqn, in, inlen); err = mlx5_core_modify_rq(mdev, rq->rqn, in);
kvfree(in); kvfree(in);
...@@ -752,7 +752,7 @@ static int mlx5e_modify_rq_scatter_fcs(struct mlx5e_rq *rq, bool enable) ...@@ -752,7 +752,7 @@ static int mlx5e_modify_rq_scatter_fcs(struct mlx5e_rq *rq, bool enable)
MLX5_SET(rqc, rqc, scatter_fcs, enable); MLX5_SET(rqc, rqc, scatter_fcs, enable);
MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RDY); MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RDY);
err = mlx5_core_modify_rq(mdev, rq->rqn, in, inlen); err = mlx5_core_modify_rq(mdev, rq->rqn, in);
kvfree(in); kvfree(in);
...@@ -781,7 +781,7 @@ static int mlx5e_modify_rq_vsd(struct mlx5e_rq *rq, bool vsd) ...@@ -781,7 +781,7 @@ static int mlx5e_modify_rq_vsd(struct mlx5e_rq *rq, bool vsd)
MLX5_SET(rqc, rqc, vsd, vsd); MLX5_SET(rqc, rqc, vsd, vsd);
MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RDY); MLX5_SET(rqc, rqc, state, MLX5_RQC_STATE_RDY);
err = mlx5_core_modify_rq(mdev, rq->rqn, in, inlen); err = mlx5_core_modify_rq(mdev, rq->rqn, in);
kvfree(in); kvfree(in);
...@@ -1259,7 +1259,7 @@ int mlx5e_modify_sq(struct mlx5_core_dev *mdev, u32 sqn, ...@@ -1259,7 +1259,7 @@ int mlx5e_modify_sq(struct mlx5_core_dev *mdev, u32 sqn,
MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, p->rl_index); MLX5_SET(sqc, sqc, packet_pacing_rate_limit_index, p->rl_index);
} }
err = mlx5_core_modify_sq(mdev, sqn, in, inlen); err = mlx5_core_modify_sq(mdev, sqn, in);
kvfree(in); kvfree(in);
...@@ -2698,7 +2698,7 @@ static void mlx5e_update_rx_hash_fields(struct mlx5e_tirc_config *ttconfig, ...@@ -2698,7 +2698,7 @@ static void mlx5e_update_rx_hash_fields(struct mlx5e_tirc_config *ttconfig,
ttconfig->rx_hash_fields = rx_hash_fields; ttconfig->rx_hash_fields = rx_hash_fields;
} }
void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen) void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in)
{ {
void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx); void *tirc = MLX5_ADDR_OF(modify_tir_in, in, ctx);
struct mlx5e_rss_params *rss = &priv->rss_params; struct mlx5e_rss_params *rss = &priv->rss_params;
...@@ -2714,7 +2714,7 @@ void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen) ...@@ -2714,7 +2714,7 @@ void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
mlx5e_update_rx_hash_fields(&ttconfig, tt, mlx5e_update_rx_hash_fields(&ttconfig, tt,
rss->rx_hash_fields[tt]); rss->rx_hash_fields[tt]);
mlx5e_build_indir_tir_ctx_hash(rss, &ttconfig, tirc, false); mlx5e_build_indir_tir_ctx_hash(rss, &ttconfig, tirc, false);
mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, inlen); mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in);
} }
if (!mlx5e_tunnel_inner_ft_supported(priv->mdev)) if (!mlx5e_tunnel_inner_ft_supported(priv->mdev))
...@@ -2725,8 +2725,7 @@ void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen) ...@@ -2725,8 +2725,7 @@ void mlx5e_modify_tirs_hash(struct mlx5e_priv *priv, void *in, int inlen)
mlx5e_update_rx_hash_fields(&ttconfig, tt, mlx5e_update_rx_hash_fields(&ttconfig, tt,
rss->rx_hash_fields[tt]); rss->rx_hash_fields[tt]);
mlx5e_build_indir_tir_ctx_hash(rss, &ttconfig, tirc, true); mlx5e_build_indir_tir_ctx_hash(rss, &ttconfig, tirc, true);
mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in, mlx5_core_modify_tir(mdev, priv->inner_indir_tir[tt].tirn, in);
inlen);
} }
} }
...@@ -2752,15 +2751,13 @@ static int mlx5e_modify_tirs_lro(struct mlx5e_priv *priv) ...@@ -2752,15 +2751,13 @@ static int mlx5e_modify_tirs_lro(struct mlx5e_priv *priv)
mlx5e_build_tir_ctx_lro(&priv->channels.params, tirc); mlx5e_build_tir_ctx_lro(&priv->channels.params, tirc);
for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) { for (tt = 0; tt < MLX5E_NUM_INDIR_TIRS; tt++) {
err = mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in, err = mlx5_core_modify_tir(mdev, priv->indir_tir[tt].tirn, in);
inlen);
if (err) if (err)
goto free_in; goto free_in;
} }
for (ix = 0; ix < priv->max_nch; ix++) { for (ix = 0; ix < priv->max_nch; ix++) {
err = mlx5_core_modify_tir(mdev, priv->direct_tir[ix].tirn, err = mlx5_core_modify_tir(mdev, priv->direct_tir[ix].tirn, in);
in, inlen);
if (err) if (err)
goto free_in; goto free_in;
} }
...@@ -3214,7 +3211,7 @@ int mlx5e_create_tis(struct mlx5_core_dev *mdev, void *in, u32 *tisn) ...@@ -3214,7 +3211,7 @@ int mlx5e_create_tis(struct mlx5_core_dev *mdev, void *in, u32 *tisn)
if (mlx5_lag_is_lacp_owner(mdev)) if (mlx5_lag_is_lacp_owner(mdev))
MLX5_SET(tisc, tisc, strict_lag_tx_port_affinity, 1); MLX5_SET(tisc, tisc, strict_lag_tx_port_affinity, 1);
return mlx5_core_create_tis(mdev, in, MLX5_ST_SZ_BYTES(create_tis_in), tisn); return mlx5_core_create_tis(mdev, in, tisn);
} }
void mlx5e_destroy_tis(struct mlx5_core_dev *mdev, u32 tisn) void mlx5e_destroy_tis(struct mlx5_core_dev *mdev, u32 tisn)
...@@ -3332,7 +3329,7 @@ int mlx5e_create_indirect_tirs(struct mlx5e_priv *priv, bool inner_ttc) ...@@ -3332,7 +3329,7 @@ int mlx5e_create_indirect_tirs(struct mlx5e_priv *priv, bool inner_ttc)
tir = &priv->indir_tir[tt]; tir = &priv->indir_tir[tt];
tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
mlx5e_build_indir_tir_ctx(priv, tt, tirc); mlx5e_build_indir_tir_ctx(priv, tt, tirc);
err = mlx5e_create_tir(priv->mdev, tir, in, inlen); err = mlx5e_create_tir(priv->mdev, tir, in);
if (err) { if (err) {
mlx5_core_warn(priv->mdev, "create indirect tirs failed, %d\n", err); mlx5_core_warn(priv->mdev, "create indirect tirs failed, %d\n", err);
goto err_destroy_inner_tirs; goto err_destroy_inner_tirs;
...@@ -3347,7 +3344,7 @@ int mlx5e_create_indirect_tirs(struct mlx5e_priv *priv, bool inner_ttc) ...@@ -3347,7 +3344,7 @@ int mlx5e_create_indirect_tirs(struct mlx5e_priv *priv, bool inner_ttc)
tir = &priv->inner_indir_tir[i]; tir = &priv->inner_indir_tir[i];
tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
mlx5e_build_inner_indir_tir_ctx(priv, i, tirc); mlx5e_build_inner_indir_tir_ctx(priv, i, tirc);
err = mlx5e_create_tir(priv->mdev, tir, in, inlen); err = mlx5e_create_tir(priv->mdev, tir, in);
if (err) { if (err) {
mlx5_core_warn(priv->mdev, "create inner indirect tirs failed, %d\n", err); mlx5_core_warn(priv->mdev, "create inner indirect tirs failed, %d\n", err);
goto err_destroy_inner_tirs; goto err_destroy_inner_tirs;
...@@ -3390,7 +3387,7 @@ int mlx5e_create_direct_tirs(struct mlx5e_priv *priv, struct mlx5e_tir *tirs) ...@@ -3390,7 +3387,7 @@ int mlx5e_create_direct_tirs(struct mlx5e_priv *priv, struct mlx5e_tir *tirs)
tir = &tirs[ix]; tir = &tirs[ix];
tirc = MLX5_ADDR_OF(create_tir_in, in, ctx); tirc = MLX5_ADDR_OF(create_tir_in, in, ctx);
mlx5e_build_direct_tir_ctx(priv, tir->rqt.rqtn, tirc); mlx5e_build_direct_tir_ctx(priv, tir->rqt.rqtn, tirc);
err = mlx5e_create_tir(priv->mdev, tir, in, inlen); err = mlx5e_create_tir(priv->mdev, tir, in);
if (unlikely(err)) if (unlikely(err))
goto err_destroy_ch_tirs; goto err_destroy_ch_tirs;
} }
......
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
View file @ e0b4b472
...@@ -568,7 +568,7 @@ struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex) ...@@ -568,7 +568,7 @@ struct mlx5_core_dev *mlx5e_hairpin_get_mdev(struct net *net, int ifindex)
static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp) static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
{ {
u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {0}; u32 in[MLX5_ST_SZ_DW(create_tir_in)] = {};
void *tirc; void *tirc;
int err; int err;
...@@ -582,7 +582,7 @@ static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp) ...@@ -582,7 +582,7 @@ static int mlx5e_hairpin_create_transport(struct mlx5e_hairpin *hp)
MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]); MLX5_SET(tirc, tirc, inline_rqn, hp->pair->rqn[0]);
MLX5_SET(tirc, tirc, transport_domain, hp->tdn); MLX5_SET(tirc, tirc, transport_domain, hp->tdn);
err = mlx5_core_create_tir(hp->func_mdev, in, MLX5_ST_SZ_BYTES(create_tir_in), &hp->tirn); err = mlx5_core_create_tir(hp->func_mdev, in, &hp->tirn);
if (err) if (err)
goto create_tir_err; goto create_tir_err;
...@@ -666,7 +666,7 @@ static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp) ...@@ -666,7 +666,7 @@ static int mlx5e_hairpin_create_indirect_tirs(struct mlx5e_hairpin *hp)
mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false); mlx5e_build_indir_tir_ctx_hash(&priv->rss_params, &ttconfig, tirc, false);
err = mlx5_core_create_tir(hp->func_mdev, in, err = mlx5_core_create_tir(hp->func_mdev, in,
MLX5_ST_SZ_BYTES(create_tir_in), &hp->indir_tirn[tt]); &hp->indir_tirn[tt]);
if (err) { if (err) {
mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err); mlx5_core_warn(hp->func_mdev, "create indirect tirs failed, %d\n", err);
goto err_destroy_tirs; goto err_destroy_tirs;
......
drivers/net/ethernet/mellanox/mlx5/core/transobj.c
View file @ e0b4b472
...@@ -36,14 +36,14 @@ ...@@ -36,14 +36,14 @@
int mlx5_core_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn) int mlx5_core_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn)
{ {
u32 in[MLX5_ST_SZ_DW(alloc_transport_domain_in)] = {0}; u32 out[MLX5_ST_SZ_DW(alloc_transport_domain_out)] = {};
u32 out[MLX5_ST_SZ_DW(alloc_transport_domain_out)] = {0}; u32 in[MLX5_ST_SZ_DW(alloc_transport_domain_in)] = {};
int err; int err;
MLX5_SET(alloc_transport_domain_in, in, opcode, MLX5_SET(alloc_transport_domain_in, in, opcode,
MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN); MLX5_CMD_OP_ALLOC_TRANSPORT_DOMAIN);
err = mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); err = mlx5_cmd_exec_inout(dev, alloc_transport_domain, in, out);
if (!err) if (!err)
*tdn = MLX5_GET(alloc_transport_domain_out, out, *tdn = MLX5_GET(alloc_transport_domain_out, out,
transport_domain); transport_domain);
...@@ -54,19 +54,18 @@ EXPORT_SYMBOL(mlx5_core_alloc_transport_domain); ...@@ -54,19 +54,18 @@ EXPORT_SYMBOL(mlx5_core_alloc_transport_domain);
void mlx5_core_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn) void mlx5_core_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn)
{ {
u32 in[MLX5_ST_SZ_DW(dealloc_transport_domain_in)] = {0}; u32 in[MLX5_ST_SZ_DW(dealloc_transport_domain_in)] = {};
u32 out[MLX5_ST_SZ_DW(dealloc_transport_domain_out)] = {0};
MLX5_SET(dealloc_transport_domain_in, in, opcode, MLX5_SET(dealloc_transport_domain_in, in, opcode,
MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN); MLX5_CMD_OP_DEALLOC_TRANSPORT_DOMAIN);
MLX5_SET(dealloc_transport_domain_in, in, transport_domain, tdn); MLX5_SET(dealloc_transport_domain_in, in, transport_domain, tdn);
mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); mlx5_cmd_exec_in(dev, dealloc_transport_domain, in);
} }
EXPORT_SYMBOL(mlx5_core_dealloc_transport_domain); EXPORT_SYMBOL(mlx5_core_dealloc_transport_domain);
int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn) int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn)
{ {
u32 out[MLX5_ST_SZ_DW(create_rq_out)] = {0}; u32 out[MLX5_ST_SZ_DW(create_rq_out)] = {};
int err; int err;
MLX5_SET(create_rq_in, in, opcode, MLX5_CMD_OP_CREATE_RQ); MLX5_SET(create_rq_in, in, opcode, MLX5_CMD_OP_CREATE_RQ);
...@@ -78,44 +77,39 @@ int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn) ...@@ -78,44 +77,39 @@ int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *rqn)
} }
EXPORT_SYMBOL(mlx5_core_create_rq); EXPORT_SYMBOL(mlx5_core_create_rq);
int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in, int inlen) int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in)
{ {
u32 out[MLX5_ST_SZ_DW(modify_rq_out)];
MLX5_SET(modify_rq_in, in, rqn, rqn); MLX5_SET(modify_rq_in, in, rqn, rqn);
MLX5_SET(modify_rq_in, in, opcode, MLX5_CMD_OP_MODIFY_RQ); MLX5_SET(modify_rq_in, in, opcode, MLX5_CMD_OP_MODIFY_RQ);
memset(out, 0, sizeof(out)); return mlx5_cmd_exec_in(dev, modify_rq, in);
return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out));
} }
EXPORT_SYMBOL(mlx5_core_modify_rq); EXPORT_SYMBOL(mlx5_core_modify_rq);
void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn) void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn)
{ {
u32 in[MLX5_ST_SZ_DW(destroy_rq_in)] = {0}; u32 in[MLX5_ST_SZ_DW(destroy_rq_in)] = {};
u32 out[MLX5_ST_SZ_DW(destroy_rq_out)] = {0};
MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ); MLX5_SET(destroy_rq_in, in, opcode, MLX5_CMD_OP_DESTROY_RQ);
MLX5_SET(destroy_rq_in, in, rqn, rqn); MLX5_SET(destroy_rq_in, in, rqn, rqn);
mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); mlx5_cmd_exec_in(dev, destroy_rq, in);
} }
EXPORT_SYMBOL(mlx5_core_destroy_rq); EXPORT_SYMBOL(mlx5_core_destroy_rq);
int mlx5_core_query_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *out) int mlx5_core_query_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *out)
{ {
u32 in[MLX5_ST_SZ_DW(query_rq_in)] = {0}; u32 in[MLX5_ST_SZ_DW(query_rq_in)] = {};
int outlen = MLX5_ST_SZ_BYTES(query_rq_out);
MLX5_SET(query_rq_in, in, opcode, MLX5_CMD_OP_QUERY_RQ); MLX5_SET(query_rq_in, in, opcode, MLX5_CMD_OP_QUERY_RQ);
MLX5_SET(query_rq_in, in, rqn, rqn); MLX5_SET(query_rq_in, in, rqn, rqn);
return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen); return mlx5_cmd_exec_inout(dev, query_rq, in, out);
} }
EXPORT_SYMBOL(mlx5_core_query_rq); EXPORT_SYMBOL(mlx5_core_query_rq);
int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn) int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn)
{ {
u32 out[MLX5_ST_SZ_DW(create_sq_out)] = {0}; u32 out[MLX5_ST_SZ_DW(create_sq_out)] = {};
int err; int err;
MLX5_SET(create_sq_in, in, opcode, MLX5_CMD_OP_CREATE_SQ); MLX5_SET(create_sq_in, in, opcode, MLX5_CMD_OP_CREATE_SQ);
...@@ -126,34 +120,30 @@ int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn) ...@@ -126,34 +120,30 @@ int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, u32 *sqn)
return err; return err;
} }
int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in, int inlen) int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in)
{ {
u32 out[MLX5_ST_SZ_DW(modify_sq_out)] = {0};
MLX5_SET(modify_sq_in, in, sqn, sqn); MLX5_SET(modify_sq_in, in, sqn, sqn);
MLX5_SET(modify_sq_in, in, opcode, MLX5_CMD_OP_MODIFY_SQ); MLX5_SET(modify_sq_in, in, opcode, MLX5_CMD_OP_MODIFY_SQ);
return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out)); return mlx5_cmd_exec_in(dev, modify_sq, in);
} }
EXPORT_SYMBOL(mlx5_core_modify_sq); EXPORT_SYMBOL(mlx5_core_modify_sq);
void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn) void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn)
{ {
u32 in[MLX5_ST_SZ_DW(destroy_sq_in)] = {0}; u32 in[MLX5_ST_SZ_DW(destroy_sq_in)] = {};
u32 out[MLX5_ST_SZ_DW(destroy_sq_out)] = {0};
MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ); MLX5_SET(destroy_sq_in, in, opcode, MLX5_CMD_OP_DESTROY_SQ);
MLX5_SET(destroy_sq_in, in, sqn, sqn); MLX5_SET(destroy_sq_in, in, sqn, sqn);
mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); mlx5_cmd_exec_in(dev, destroy_sq, in);
} }
int mlx5_core_query_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *out) int mlx5_core_query_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *out)
{ {
u32 in[MLX5_ST_SZ_DW(query_sq_in)] = {0}; u32 in[MLX5_ST_SZ_DW(query_sq_in)] = {};
int outlen = MLX5_ST_SZ_BYTES(query_sq_out);
MLX5_SET(query_sq_in, in, opcode, MLX5_CMD_OP_QUERY_SQ); MLX5_SET(query_sq_in, in, opcode, MLX5_CMD_OP_QUERY_SQ);
MLX5_SET(query_sq_in, in, sqn, sqn); MLX5_SET(query_sq_in, in, sqn, sqn);
return mlx5_cmd_exec(dev, in, sizeof(in), out, outlen); return mlx5_cmd_exec_inout(dev, query_sq, in, out);
} }
EXPORT_SYMBOL(mlx5_core_query_sq); EXPORT_SYMBOL(mlx5_core_query_sq);
...@@ -182,24 +172,13 @@ int mlx5_core_query_sq_state(struct mlx5_core_dev *dev, u32 sqn, u8 *state) ...@@ -182,24 +172,13 @@ int mlx5_core_query_sq_state(struct mlx5_core_dev *dev, u32 sqn, u8 *state)
} }
EXPORT_SYMBOL_GPL(mlx5_core_query_sq_state); EXPORT_SYMBOL_GPL(mlx5_core_query_sq_state);
int mlx5_core_create_tir_out(struct mlx5_core_dev *dev, int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, u32 *tirn)
u32 *in, int inlen,
u32 *out, int outlen)
{
MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR);
return mlx5_cmd_exec(dev, in, inlen, out, outlen);
}
EXPORT_SYMBOL(mlx5_core_create_tir_out);
int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen,
u32 *tirn)
{ {
u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {}; u32 out[MLX5_ST_SZ_DW(create_tir_out)] = {};
int err; int err;
err = mlx5_core_create_tir_out(dev, in, inlen, MLX5_SET(create_tir_in, in, opcode, MLX5_CMD_OP_CREATE_TIR);
out, sizeof(out)); err = mlx5_cmd_exec_inout(dev, create_tir, in, out);
if (!err) if (!err)
*tirn = MLX5_GET(create_tir_out, out, tirn); *tirn = MLX5_GET(create_tir_out, out, tirn);
...@@ -207,35 +186,30 @@ int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen, ...@@ -207,35 +186,30 @@ int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen,
} }
EXPORT_SYMBOL(mlx5_core_create_tir); EXPORT_SYMBOL(mlx5_core_create_tir);
int mlx5_core_modify_tir(struct mlx5_core_dev *dev, u32 tirn, u32 *in, int mlx5_core_modify_tir(struct mlx5_core_dev *dev, u32 tirn, u32 *in)
int inlen)
{ {
u32 out[MLX5_ST_SZ_DW(modify_tir_out)] = {0};
MLX5_SET(modify_tir_in, in, tirn, tirn); MLX5_SET(modify_tir_in, in, tirn, tirn);
MLX5_SET(modify_tir_in, in, opcode, MLX5_CMD_OP_MODIFY_TIR); MLX5_SET(modify_tir_in, in, opcode, MLX5_CMD_OP_MODIFY_TIR);
return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out)); return mlx5_cmd_exec_in(dev, modify_tir, in);
} }
void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn) void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn)
{ {
u32 in[MLX5_ST_SZ_DW(destroy_tir_in)] = {0}; u32 in[MLX5_ST_SZ_DW(destroy_tir_in)] = {};
u32 out[MLX5_ST_SZ_DW(destroy_tir_out)] = {0};
MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR); MLX5_SET(destroy_tir_in, in, opcode, MLX5_CMD_OP_DESTROY_TIR);
MLX5_SET(destroy_tir_in, in, tirn, tirn); MLX5_SET(destroy_tir_in, in, tirn, tirn);
mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); mlx5_cmd_exec_in(dev, destroy_tir, in);
} }
EXPORT_SYMBOL(mlx5_core_destroy_tir); EXPORT_SYMBOL(mlx5_core_destroy_tir);
int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen, int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, u32 *tisn)
u32 *tisn)
{ {
u32 out[MLX5_ST_SZ_DW(create_tis_out)] = {0}; u32 out[MLX5_ST_SZ_DW(create_tis_out)] = {};
int err; int err;
MLX5_SET(create_tis_in, in, opcode, MLX5_CMD_OP_CREATE_TIS); MLX5_SET(create_tis_in, in, opcode, MLX5_CMD_OP_CREATE_TIS);
err = mlx5_cmd_exec(dev, in, inlen, out, sizeof(out)); err = mlx5_cmd_exec_inout(dev, create_tis, in, out);
if (!err) if (!err)
*tisn = MLX5_GET(create_tis_out, out, tisn); *tisn = MLX5_GET(create_tis_out, out, tisn);
...@@ -243,33 +217,29 @@ int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen, ...@@ -243,33 +217,29 @@ int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen,
} }
EXPORT_SYMBOL(mlx5_core_create_tis); EXPORT_SYMBOL(mlx5_core_create_tis);
int mlx5_core_modify_tis(struct mlx5_core_dev *dev, u32 tisn, u32 *in, int mlx5_core_modify_tis(struct mlx5_core_dev *dev, u32 tisn, u32 *in)
int inlen)
{ {
u32 out[MLX5_ST_SZ_DW(modify_tis_out)] = {0};
MLX5_SET(modify_tis_in, in, tisn, tisn); MLX5_SET(modify_tis_in, in, tisn, tisn);
MLX5_SET(modify_tis_in, in, opcode, MLX5_CMD_OP_MODIFY_TIS); MLX5_SET(modify_tis_in, in, opcode, MLX5_CMD_OP_MODIFY_TIS);
return mlx5_cmd_exec(dev, in, inlen, out, sizeof(out)); return mlx5_cmd_exec_in(dev, modify_tis, in);
} }
EXPORT_SYMBOL(mlx5_core_modify_tis); EXPORT_SYMBOL(mlx5_core_modify_tis);
void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn) void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn)
{ {
u32 in[MLX5_ST_SZ_DW(destroy_tis_in)] = {0}; u32 in[MLX5_ST_SZ_DW(destroy_tis_in)] = {};
u32 out[MLX5_ST_SZ_DW(destroy_tis_out)] = {0};
MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS); MLX5_SET(destroy_tis_in, in, opcode, MLX5_CMD_OP_DESTROY_TIS);
MLX5_SET(destroy_tis_in, in, tisn, tisn); MLX5_SET(destroy_tis_in, in, tisn, tisn);
mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); mlx5_cmd_exec_in(dev, destroy_tis, in);
} }
EXPORT_SYMBOL(mlx5_core_destroy_tis); EXPORT_SYMBOL(mlx5_core_destroy_tis);
int mlx5_core_create_rqt(struct mlx5_core_dev *dev, u32 *in, int inlen, int mlx5_core_create_rqt(struct mlx5_core_dev *dev, u32 *in, int inlen,
u32 *rqtn) u32 *rqtn)
{ {
u32 out[MLX5_ST_SZ_DW(create_rqt_out)] = {0}; u32 out[MLX5_ST_SZ_DW(create_rqt_out)] = {};
int err; int err;
MLX5_SET(create_rqt_in, in, opcode, MLX5_CMD_OP_CREATE_RQT); MLX5_SET(create_rqt_in, in, opcode, MLX5_CMD_OP_CREATE_RQT);
...@@ -284,7 +254,7 @@ EXPORT_SYMBOL(mlx5_core_create_rqt); ...@@ -284,7 +254,7 @@ EXPORT_SYMBOL(mlx5_core_create_rqt);
int mlx5_core_modify_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 *in, int mlx5_core_modify_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 *in,
int inlen) int inlen)
{ {
u32 out[MLX5_ST_SZ_DW(modify_rqt_out)] = {0}; u32 out[MLX5_ST_SZ_DW(modify_rqt_out)] = {};
MLX5_SET(modify_rqt_in, in, rqtn, rqtn); MLX5_SET(modify_rqt_in, in, rqtn, rqtn);
MLX5_SET(modify_rqt_in, in, opcode, MLX5_CMD_OP_MODIFY_RQT); MLX5_SET(modify_rqt_in, in, opcode, MLX5_CMD_OP_MODIFY_RQT);
...@@ -293,12 +263,11 @@ int mlx5_core_modify_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 *in, ...@@ -293,12 +263,11 @@ int mlx5_core_modify_rqt(struct mlx5_core_dev *dev, u32 rqtn, u32 *in,
void mlx5_core_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn) void mlx5_core_destroy_rqt(struct mlx5_core_dev *dev, u32 rqtn)
{ {
u32 in[MLX5_ST_SZ_DW(destroy_rqt_in)] = {0}; u32 in[MLX5_ST_SZ_DW(destroy_rqt_in)] = {};
u32 out[MLX5_ST_SZ_DW(destroy_rqt_out)] = {0};
MLX5_SET(destroy_rqt_in, in, opcode, MLX5_CMD_OP_DESTROY_RQT); MLX5_SET(destroy_rqt_in, in, opcode, MLX5_CMD_OP_DESTROY_RQT);
MLX5_SET(destroy_rqt_in, in, rqtn, rqtn); MLX5_SET(destroy_rqt_in, in, rqtn, rqtn);
mlx5_cmd_exec(dev, in, sizeof(in), out, sizeof(out)); mlx5_cmd_exec_in(dev, destroy_rqt, in);
} }
EXPORT_SYMBOL(mlx5_core_destroy_rqt); EXPORT_SYMBOL(mlx5_core_destroy_rqt);
...@@ -383,7 +352,7 @@ static int mlx5_hairpin_modify_rq(struct mlx5_core_dev *func_mdev, u32 rqn, ...@@ -383,7 +352,7 @@ static int mlx5_hairpin_modify_rq(struct mlx5_core_dev *func_mdev, u32 rqn,
int curr_state, int next_state, int curr_state, int next_state,
u16 peer_vhca, u32 peer_sq) u16 peer_vhca, u32 peer_sq)
{ {
u32 in[MLX5_ST_SZ_DW(modify_rq_in)] = {0}; u32 in[MLX5_ST_SZ_DW(modify_rq_in)] = {};
void *rqc; void *rqc;
rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx); rqc = MLX5_ADDR_OF(modify_rq_in, in, ctx);
...@@ -396,8 +365,7 @@ static int mlx5_hairpin_modify_rq(struct mlx5_core_dev *func_mdev, u32 rqn, ...@@ -396,8 +365,7 @@ static int mlx5_hairpin_modify_rq(struct mlx5_core_dev *func_mdev, u32 rqn,
MLX5_SET(modify_rq_in, in, rq_state, curr_state); MLX5_SET(modify_rq_in, in, rq_state, curr_state);
MLX5_SET(rqc, rqc, state, next_state); MLX5_SET(rqc, rqc, state, next_state);
return mlx5_core_modify_rq(func_mdev, rqn, return mlx5_core_modify_rq(func_mdev, rqn, in);
in, MLX5_ST_SZ_BYTES(modify_rq_in));
} }
static int mlx5_hairpin_modify_sq(struct mlx5_core_dev *peer_mdev, u32 sqn, static int mlx5_hairpin_modify_sq(struct mlx5_core_dev *peer_mdev, u32 sqn,
...@@ -417,8 +385,7 @@ static int mlx5_hairpin_modify_sq(struct mlx5_core_dev *peer_mdev, u32 sqn, ...@@ -417,8 +385,7 @@ static int mlx5_hairpin_modify_sq(struct mlx5_core_dev *peer_mdev, u32 sqn,
MLX5_SET(modify_sq_in, in, sq_state, curr_state); MLX5_SET(modify_sq_in, in, sq_state, curr_state);
MLX5_SET(sqc, sqc, state, next_state); MLX5_SET(sqc, sqc, state, next_state);
return mlx5_core_modify_sq(peer_mdev, sqn, return mlx5_core_modify_sq(peer_mdev, sqn, in);
in, MLX5_ST_SZ_BYTES(modify_sq_in));
} }
static int mlx5_hairpin_pair_queues(struct mlx5_hairpin *hp) static int mlx5_hairpin_pair_queues(struct mlx5_hairpin *hp)
......
include/linux/mlx5/transobj.h
View file @ e0b4b472
...@@ -39,27 +39,20 @@ int mlx5_core_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn); ...@@ -39,27 +39,20 @@ int mlx5_core_alloc_transport_domain(struct mlx5_core_dev *dev, u32 *tdn);
void mlx5_core_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn); void mlx5_core_dealloc_transport_domain(struct mlx5_core_dev *dev, u32 tdn);
int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen, int mlx5_core_create_rq(struct mlx5_core_dev *dev, u32 *in, int inlen,
u32 *rqn); u32 *rqn);
int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in, int inlen); int mlx5_core_modify_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *in);
void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn); void mlx5_core_destroy_rq(struct mlx5_core_dev *dev, u32 rqn);
int mlx5_core_query_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *out); int mlx5_core_query_rq(struct mlx5_core_dev *dev, u32 rqn, u32 *out);
int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen, int mlx5_core_create_sq(struct mlx5_core_dev *dev, u32 *in, int inlen,
u32 *sqn); u32 *sqn);
int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in, int inlen); int mlx5_core_modify_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *in);
void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn); void mlx5_core_destroy_sq(struct mlx5_core_dev *dev, u32 sqn);
int mlx5_core_query_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *out); int mlx5_core_query_sq(struct mlx5_core_dev *dev, u32 sqn, u32 *out);
int mlx5_core_query_sq_state(struct mlx5_core_dev *dev, u32 sqn, u8 *state); int mlx5_core_query_sq_state(struct mlx5_core_dev *dev, u32 sqn, u8 *state);
int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, int inlen, int mlx5_core_create_tir(struct mlx5_core_dev *dev, u32 *in, u32 *tirn);
u32 *tirn); int mlx5_core_modify_tir(struct mlx5_core_dev *dev, u32 tirn, u32 *in);
int mlx5_core_create_tir_out(struct mlx5_core_dev *dev,
u32 *in, int inlen,
u32 *out, int outlen);
int mlx5_core_modify_tir(struct mlx5_core_dev *dev, u32 tirn, u32 *in,
int inlen);
void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn); void mlx5_core_destroy_tir(struct mlx5_core_dev *dev, u32 tirn);
int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, int inlen, int mlx5_core_create_tis(struct mlx5_core_dev *dev, u32 *in, u32 *tisn);
u32 *tisn); int mlx5_core_modify_tis(struct mlx5_core_dev *dev, u32 tisn, u32 *in);
int mlx5_core_modify_tis(struct mlx5_core_dev *dev, u32 tisn, u32 *in,
int inlen);
void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn); void mlx5_core_destroy_tis(struct mlx5_core_dev *dev, u32 tisn);
int mlx5_core_create_rqt(struct mlx5_core_dev *dev, u32 *in, int inlen, int mlx5_core_create_rqt(struct mlx5_core_dev *dev, u32 *in, int inlen,
u32 *rqtn); u32 *rqtn);
......
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