Commit e0d5a28b authored by Frank Li's avatar Frank Li Committed by Shawn Guo

arm64: dts: imx8: update lpuart[0..3] irq number

Original irq number combined UART irq and DMA irq. These doesn't match
uart driver and dma engine's expection.

Update to the irq numbers, which just uart can trigger.
Signed-off-by: default avatarFrank Li <Frank.Li@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 232f80f0
......@@ -86,7 +86,7 @@ lpspi3: spi@5a030000 {
lpuart0: serial@5a060000 {
reg = <0x5a060000 0x1000>;
interrupts = <GIC_SPI 225 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uart0_lpcg IMX_LPCG_CLK_4>,
<&uart0_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "baud";
......@@ -100,7 +100,7 @@ lpuart0: serial@5a060000 {
lpuart1: serial@5a070000 {
reg = <0x5a070000 0x1000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uart1_lpcg IMX_LPCG_CLK_4>,
<&uart1_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "baud";
......@@ -114,7 +114,7 @@ lpuart1: serial@5a070000 {
lpuart2: serial@5a080000 {
reg = <0x5a080000 0x1000>;
interrupts = <GIC_SPI 227 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uart2_lpcg IMX_LPCG_CLK_4>,
<&uart2_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "baud";
......@@ -128,7 +128,7 @@ lpuart2: serial@5a080000 {
lpuart3: serial@5a090000 {
reg = <0x5a090000 0x1000>;
interrupts = <GIC_SPI 228 IRQ_TYPE_LEVEL_HIGH>;
interrupts = <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&uart3_lpcg IMX_LPCG_CLK_4>,
<&uart3_lpcg IMX_LPCG_CLK_0>;
clock-names = "ipg", "baud";
......
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