Commit e0f0c706 authored by Geert Uytterhoeven's avatar Geert Uytterhoeven

ARM: dts: renesas: Group tuples in APMU cpus properties

To improve human readability and enable automatic validation, the tuples
in "cpus" properties in device nodes for Advanced Power Management Units
for AP-System Core (APMU) should be grouped using angle brackets.
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210204130517.1647073-2-geert+renesas@glider.be
parent 22650045
...@@ -367,13 +367,13 @@ cpg: clock-controller@e6150000 { ...@@ -367,13 +367,13 @@ cpg: clock-controller@e6150000 {
apmu@e6151000 { apmu@e6151000 {
compatible = "renesas,r8a7742-apmu", "renesas,apmu"; compatible = "renesas,r8a7742-apmu", "renesas,apmu";
reg = <0 0xe6151000 0 0x188>; reg = <0 0xe6151000 0 0x188>;
cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
}; };
apmu@e6152000 { apmu@e6152000 {
compatible = "renesas,r8a7742-apmu", "renesas,apmu"; compatible = "renesas,r8a7742-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>; reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -293,7 +293,7 @@ cpg: clock-controller@e6150000 { ...@@ -293,7 +293,7 @@ cpg: clock-controller@e6150000 {
apmu@e6152000 { apmu@e6152000 {
compatible = "renesas,r8a7743-apmu", "renesas,apmu"; compatible = "renesas,r8a7743-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>; reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>; cpus = <&cpu0>, <&cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -293,7 +293,7 @@ cpg: clock-controller@e6150000 { ...@@ -293,7 +293,7 @@ cpg: clock-controller@e6150000 {
apmu@e6152000 { apmu@e6152000 {
compatible = "renesas,r8a7744-apmu", "renesas,apmu"; compatible = "renesas,r8a7744-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>; reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>; cpus = <&cpu0>, <&cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -258,7 +258,7 @@ cpg: clock-controller@e6150000 { ...@@ -258,7 +258,7 @@ cpg: clock-controller@e6150000 {
apmu@e6151000 { apmu@e6151000 {
compatible = "renesas,r8a7745-apmu", "renesas,apmu"; compatible = "renesas,r8a7745-apmu", "renesas,apmu";
reg = <0 0xe6151000 0 0x188>; reg = <0 0xe6151000 0 0x188>;
cpus = <&cpu0 &cpu1>; cpus = <&cpu0>, <&cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -205,7 +205,7 @@ cpg: clock-controller@e6150000 { ...@@ -205,7 +205,7 @@ cpg: clock-controller@e6150000 {
apmu@e6151000 { apmu@e6151000 {
compatible = "renesas,r8a77470-apmu", "renesas,apmu"; compatible = "renesas,r8a77470-apmu", "renesas,apmu";
reg = <0 0xe6151000 0 0x188>; reg = <0 0xe6151000 0 0x188>;
cpus = <&cpu0 &cpu1>; cpus = <&cpu0>, <&cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -381,13 +381,13 @@ cpg: clock-controller@e6150000 { ...@@ -381,13 +381,13 @@ cpg: clock-controller@e6150000 {
apmu@e6151000 { apmu@e6151000 {
compatible = "renesas,r8a7790-apmu", "renesas,apmu"; compatible = "renesas,r8a7790-apmu", "renesas,apmu";
reg = <0 0xe6151000 0 0x188>; reg = <0 0xe6151000 0 0x188>;
cpus = <&cpu4 &cpu5 &cpu6 &cpu7>; cpus = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
}; };
apmu@e6152000 { apmu@e6152000 {
compatible = "renesas,r8a7790-apmu", "renesas,apmu"; compatible = "renesas,r8a7790-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>; reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1 &cpu2 &cpu3>; cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -315,7 +315,7 @@ cpg: clock-controller@e6150000 { ...@@ -315,7 +315,7 @@ cpg: clock-controller@e6150000 {
apmu@e6152000 { apmu@e6152000 {
compatible = "renesas,r8a7791-apmu", "renesas,apmu"; compatible = "renesas,r8a7791-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>; reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>; cpus = <&cpu0>, <&cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -314,7 +314,7 @@ cpg: clock-controller@e6150000 { ...@@ -314,7 +314,7 @@ cpg: clock-controller@e6150000 {
apmu@e6152000 { apmu@e6152000 {
compatible = "renesas,r8a7792-apmu", "renesas,apmu"; compatible = "renesas,r8a7792-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>; reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>; cpus = <&cpu0>, <&cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -290,7 +290,7 @@ cpg: clock-controller@e6150000 { ...@@ -290,7 +290,7 @@ cpg: clock-controller@e6150000 {
apmu@e6152000 { apmu@e6152000 {
compatible = "renesas,r8a7793-apmu", "renesas,apmu"; compatible = "renesas,r8a7793-apmu", "renesas,apmu";
reg = <0 0xe6152000 0 0x188>; reg = <0 0xe6152000 0 0x188>;
cpus = <&cpu0 &cpu1>; cpus = <&cpu0>, <&cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
...@@ -256,7 +256,7 @@ cpg: clock-controller@e6150000 { ...@@ -256,7 +256,7 @@ cpg: clock-controller@e6150000 {
apmu@e6151000 { apmu@e6151000 {
compatible = "renesas,r8a7794-apmu", "renesas,apmu"; compatible = "renesas,r8a7794-apmu", "renesas,apmu";
reg = <0 0xe6151000 0 0x188>; reg = <0 0xe6151000 0 0x188>;
cpus = <&cpu0 &cpu1>; cpus = <&cpu0>, <&cpu1>;
}; };
rst: reset-controller@e6160000 { rst: reset-controller@e6160000 {
......
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