Commit e12f1e5c authored by Geert Uytterhoeven's avatar Geert Uytterhoeven Committed by Linus Torvalds

[PATCH] M68k IDE

M68k IDE:
  - Update for new-style low-level IDE operations. Since so far no single
    m68k platform uses ISA/PCI I/O space for IDE, we always use the `raw' MMIO
    versions.
  - ATA_ARCH_LOCK was renamed to IDE_ARCH_LOCK
  - Define ide_ack_intr() and set IDE_ARCH_ACK_INTR
parent 19b87001
...@@ -82,72 +82,64 @@ static __inline__ void ide_init_default_hwifs(void) ...@@ -82,72 +82,64 @@ static __inline__ void ide_init_default_hwifs(void)
{ {
} }
#undef SUPPORT_SLOW_DATA_PORTS /*
#define SUPPORT_SLOW_DATA_PORTS 0 * Get rid of defs from io.h - ide has its private and conflicting versions
* Since so far no single m68k platform uses ISA/PCI I/O space for IDE, we
/* this definition is used only on startup .. */ * always use the `raw' MMIO versions
#undef HD_DATA */
#define HD_DATA NULL
/* get rid of defs from io.h - ide has its private and conflicting versions */
#undef inb #undef inb
#undef inw #undef inw
#undef insw
#undef inl
#undef insl
#undef outb #undef outb
#undef outw #undef outw
#undef inb_p
#undef outb_p
#undef insw
#undef outsw #undef outsw
#undef insw_swapw #undef outl
#undef outsw_swapw #undef outsl
#undef readb
/* #undef readw
* define IO method and translation, #undef readl
* so far only Q40 has ide-if on ISA #undef writeb
*/ #undef writew
#ifndef CONFIG_Q40 #undef writel
#define ADDR_TRANS_B(_addr_) (_addr_) #define inb in_8
#define ADDR_TRANS_W(_addr_) (_addr_) #define inw in_be16
#define insw(port, addr, n) raw_insw((u16 *)port, addr, n)
#else #define inl in_be32
#define insl(port, addr, n) raw_insl((u32 *)port, addr, n)
#define ADDR_TRANS_B(_addr_) (MACH_IS_Q40 ? ((unsigned char *)Q40_ISA_IO_B(_addr_)) : (_addr_)) #define outb(val, port) out_8(port, val)
#define ADDR_TRANS_W(_addr_) (MACH_IS_Q40 ? ((unsigned char *)Q40_ISA_IO_W(_addr_)) : (_addr_)) #define outw(val, port) out_be16(port, val)
#endif #define outsw(port, addr, n) raw_outsw((u16 *)port, addr, n)
#define outl(val, port) out_be32(port, val)
#define inb(p) in_8(ADDR_TRANS_B(p)) #define outsl(port, addr, n) raw_outsl((u32 *)port, addr, n)
#define inb_p(p) in_8(ADDR_TRANS_B(p)) #define readb in_8
#define inw(p) in_be16(ADDR_TRANS_W(p)) #define readw in_be16
#define inw_p(p) in_be16(ADDR_TRANS_W(p)) #define __ide_mm_insw(port, addr, n) raw_insw((u16 *)port, addr, n)
#define outb(v,p) out_8(ADDR_TRANS_B(p),v) #define readl in_be32
#define outb_p(v,p) out_8(ADDR_TRANS_B(p),v) #define __ide_mm_insl(port, addr, n) raw_insl((u32 *)port, addr, n)
#define outw(v,p) out_be16(ADDR_TRANS_W(p),v) #define writeb(val, port) out_8(port, val)
#define writew(val, port) out_be16(port, val)
#define insw(port, buf, nr) raw_insw(ADDR_TRANS_W(port), buf, nr) #define __ide_mm_outsw(port, addr, n) raw_outsw((u16 *)port, addr, n)
#define outsw(port, buf, nr) raw_outsw(ADDR_TRANS_W(port), buf, nr) #define writel(val, port) out_be32(port, val)
#define __ide_mm_outsl(port, addr, n) raw_outsl((u32 *)port, addr, n)
#define insl(data_reg, buffer, wcount) insw(data_reg, buffer, (wcount)<<1)
#define outsl(data_reg, buffer, wcount) outsw(data_reg, buffer, (wcount)<<1)
#if defined(CONFIG_ATARI) || defined(CONFIG_Q40) #if defined(CONFIG_ATARI) || defined(CONFIG_Q40)
#define insw_swapw(port, addr, n) raw_insw_swapw((u16 *)port, addr, n)
#define outsw_swapw(port, addr, n) raw_outsw_swapw((u16 *)port, addr, n)
#endif
#define insl_swapw(data_reg, buffer, wcount) \
insw_swapw(data_reg, buffer, (wcount)<<1)
#define outsl_swapw(data_reg, buffer, wcount) \
outsw_swapw(data_reg, buffer, (wcount)<<1)
#define insw_swapw(port, buf, nr) raw_insw_swapw(ADDR_TRANS_W(port), buf, nr)
#define outsw_swapw(port, buf, nr) raw_outsw_swapw(ADDR_TRANS_W(port),buf,nr)
#endif /* CONFIG_ATARI || CONFIG_Q40 */
#define ATA_ARCH_ACK_INTR /* Q40 and Atari have byteswapped IDE busses and since many interesting
* values in the identification string are text, chars and words they
* happened to be almost correct without swapping.. However *_capacity
* is needed for drives over 8 GB. RZ */
#if defined(CONFIG_Q40) || defined(CONFIG_ATARI)
#define M68K_IDE_SWAPW (MACH_IS_Q40 || MACH_IS_ATARI)
#endif
#ifdef CONFIG_BLK_DEV_FALCON_IDE #ifdef CONFIG_BLK_DEV_FALCON_IDE
#define ATA_ARCH_LOCK #define IDE_ARCH_LOCK
extern int falconide_intr_lock; extern int falconide_intr_lock;
...@@ -176,5 +168,9 @@ ide_get_lock(irqreturn_t (*handler)(int, void *, struct pt_regs *), void *data) ...@@ -176,5 +168,9 @@ ide_get_lock(irqreturn_t (*handler)(int, void *, struct pt_regs *), void *data)
} }
} }
#endif /* CONFIG_BLK_DEV_FALCON_IDE */ #endif /* CONFIG_BLK_DEV_FALCON_IDE */
#define IDE_ARCH_ACK_INTR
#define ide_ack_intr(hwif) ((hwif)->hw.ack_intr ? (hwif)->hw.ack_intr(hwif) : 1)
#endif /* __KERNEL__ */ #endif /* __KERNEL__ */
#endif /* _M68K_IDE_H */ #endif /* _M68K_IDE_H */
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