Commit e15c9d06 authored by Bokun Zhang's avatar Bokun Zhang Committed by Alex Deucher

drm/amd/amdgpu: Update PF2VF header

- In the latest version of the header, there is a variable name change.
  This should not cause any backward compatibility since the variable is
  at the same offset in the struct.
Signed-off-by: default avatarBokun Zhang <Bokun.Zhang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 451913e9
...@@ -3700,7 +3700,7 @@ int amdgpu_device_init(struct amdgpu_device *adev, ...@@ -3700,7 +3700,7 @@ int amdgpu_device_init(struct amdgpu_device *adev,
/* enable PCIE atomic ops */ /* enable PCIE atomic ops */
if (amdgpu_sriov_vf(adev)) if (amdgpu_sriov_vf(adev))
adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *) adev->have_atomics_support = ((struct amd_sriov_msg_pf2vf_info *)
adev->virt.fw_reserve.p_pf2vf)->pcie_atomic_ops_enabled_flags == adev->virt.fw_reserve.p_pf2vf)->pcie_atomic_ops_support_flags ==
(PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64); (PCI_EXP_DEVCAP2_ATOMIC_COMP32 | PCI_EXP_DEVCAP2_ATOMIC_COMP64);
else else
adev->have_atomics_support = adev->have_atomics_support =
......
...@@ -155,6 +155,7 @@ struct amd_sriov_msg_pf2vf_info_header { ...@@ -155,6 +155,7 @@ struct amd_sriov_msg_pf2vf_info_header {
uint32_t reserved[2]; uint32_t reserved[2];
}; };
#define AMD_SRIOV_MSG_PF2VF_INFO_FILLED_SIZE (48)
struct amd_sriov_msg_pf2vf_info { struct amd_sriov_msg_pf2vf_info {
/* header contains size and version */ /* header contains size and version */
struct amd_sriov_msg_pf2vf_info_header header; struct amd_sriov_msg_pf2vf_info_header header;
...@@ -203,10 +204,10 @@ struct amd_sriov_msg_pf2vf_info { ...@@ -203,10 +204,10 @@ struct amd_sriov_msg_pf2vf_info {
} mm_bw_management[AMD_SRIOV_MSG_RESERVE_VCN_INST]; } mm_bw_management[AMD_SRIOV_MSG_RESERVE_VCN_INST];
/* UUID info */ /* UUID info */
struct amd_sriov_msg_uuid_info uuid_info; struct amd_sriov_msg_uuid_info uuid_info;
/* pcie atomic Ops info */ /* PCIE atomic ops support flag */
uint32_t pcie_atomic_ops_enabled_flags; uint32_t pcie_atomic_ops_support_flags;
/* reserved */ /* reserved */
uint32_t reserved[256 - 48]; uint32_t reserved[256 - AMD_SRIOV_MSG_PF2VF_INFO_FILLED_SIZE];
}; };
struct amd_sriov_msg_vf2pf_info_header { struct amd_sriov_msg_vf2pf_info_header {
...@@ -218,6 +219,7 @@ struct amd_sriov_msg_vf2pf_info_header { ...@@ -218,6 +219,7 @@ struct amd_sriov_msg_vf2pf_info_header {
uint32_t reserved[2]; uint32_t reserved[2];
}; };
#define AMD_SRIOV_MSG_VF2PF_INFO_FILLED_SIZE (70)
struct amd_sriov_msg_vf2pf_info { struct amd_sriov_msg_vf2pf_info {
/* header contains size and version */ /* header contains size and version */
struct amd_sriov_msg_vf2pf_info_header header; struct amd_sriov_msg_vf2pf_info_header header;
...@@ -263,7 +265,7 @@ struct amd_sriov_msg_vf2pf_info { ...@@ -263,7 +265,7 @@ struct amd_sriov_msg_vf2pf_info {
uint64_t dummy_page_addr; uint64_t dummy_page_addr;
/* reserved */ /* reserved */
uint32_t reserved[256 - 70]; uint32_t reserved[256 - AMD_SRIOV_MSG_VF2PF_INFO_FILLED_SIZE];
}; };
/* mailbox message send from guest to host */ /* mailbox message send from guest to host */
......
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