Commit e17d1364 authored by Dario Binacchi's avatar Dario Binacchi Committed by Jyri Sarha

drm/tilcdc: rename req_rate to pclk_rate

The req_rate name is a little misleading, so let's rename to pclk_rate
(pixel clock rate).
Signed-off-by: default avatarDario Binacchi <dariobin@libero.it>
Reviewed-by: default avatarJyri Sarha <jyri.sarha@iki.fi>
Reviewed-by: default avatarTomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: default avatarJyri Sarha <jyri.sarha@iki.fi>
Link: https://patchwork.freedesktop.org/patch/msgid/20210322213337.26667-2-dariobin@libero.it
parent da588d48
...@@ -203,18 +203,18 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) ...@@ -203,18 +203,18 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
struct drm_device *dev = crtc->dev; struct drm_device *dev = crtc->dev;
struct tilcdc_drm_private *priv = dev->dev_private; struct tilcdc_drm_private *priv = dev->dev_private;
struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc); struct tilcdc_crtc *tilcdc_crtc = to_tilcdc_crtc(crtc);
unsigned long clk_rate, real_rate, req_rate; unsigned long clk_rate, real_rate, pclk_rate;
unsigned int clkdiv; unsigned int clkdiv;
int ret; int ret;
clkdiv = 2; /* first try using a standard divider of 2 */ clkdiv = 2; /* first try using a standard divider of 2 */
/* mode.clock is in KHz, set_rate wants parameter in Hz */ /* mode.clock is in KHz, set_rate wants parameter in Hz */
req_rate = crtc->mode.clock * 1000; pclk_rate = crtc->mode.clock * 1000;
ret = clk_set_rate(priv->clk, req_rate * clkdiv); ret = clk_set_rate(priv->clk, pclk_rate * clkdiv);
clk_rate = clk_get_rate(priv->clk); clk_rate = clk_get_rate(priv->clk);
if (ret < 0 || tilcdc_pclk_diff(req_rate, clk_rate) > 5) { if (ret < 0 || tilcdc_pclk_diff(pclk_rate, clk_rate) > 5) {
/* /*
* If we fail to set the clock rate (some architectures don't * If we fail to set the clock rate (some architectures don't
* use the common clock framework yet and may not implement * use the common clock framework yet and may not implement
...@@ -229,7 +229,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) ...@@ -229,7 +229,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
return; return;
} }
clkdiv = DIV_ROUND_CLOSEST(clk_rate, req_rate); clkdiv = DIV_ROUND_CLOSEST(clk_rate, pclk_rate);
/* /*
* Emit a warning if the real clock rate resulting from the * Emit a warning if the real clock rate resulting from the
...@@ -238,7 +238,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc) ...@@ -238,7 +238,7 @@ static void tilcdc_crtc_set_clk(struct drm_crtc *crtc)
* 5% is an arbitrary value - LCDs are usually quite tolerant * 5% is an arbitrary value - LCDs are usually quite tolerant
* about pixel clock rates. * about pixel clock rates.
*/ */
real_rate = clkdiv * req_rate; real_rate = clkdiv * pclk_rate;
if (tilcdc_pclk_diff(clk_rate, real_rate) > 5) { if (tilcdc_pclk_diff(clk_rate, real_rate) > 5) {
dev_warn(dev->dev, dev_warn(dev->dev,
......
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