[ARM] Use cpu_vm_mask to determine whether to flush TLB/caches.

Since bit 0 is only set when the MM is mapped onto the CPU, we can use
this rather than comparing the MM pointer with current->active_mm.
This simplifies the inline cache flushing and tlb code.

include/asm-arm/cacheflush.h

@@ -256,14 +256,14 @@ extern void dmac_flush_range(unsigned long, unsigned long);
 
 static inline void flush_cache_mm(struct mm_struct *mm)
 {
-	if (current->active_mm == mm)
+	if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask))
 		__cpuc_flush_user_all();
 }
 
 static inline void
 flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end)
 {
-	if (current->active_mm == vma->vm_mm)
+	if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask))
 		__cpuc_flush_user_range(start & PAGE_MASK, PAGE_ALIGN(end),
 					vma->vm_flags);
 }
@@ -271,7 +271,7 @@ flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long
 static inline void
 flush_cache_page(struct vm_area_struct *vma, unsigned long user_addr)
 {
-	if (current->active_mm == vma->vm_mm) {
+	if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
 		unsigned long addr = user_addr & PAGE_MASK;
 		__cpuc_flush_user_range(addr, addr + PAGE_SIZE, vma->vm_flags);
 	}

include/asm-arm/tlbflush.h

@@ -262,7 +262,7 @@ static inline void flush_tlb_mm(struct mm_struct *mm)
 	if (tlb_flag(TLB_WB))
 		asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero));
 
-	if (mm == current->active_mm) {
+	if (cpu_isset(smp_processor_id(), mm->cpu_vm_mask)) {
 		if (tlb_flag(TLB_V3_FULL))
 			asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (zero));
 		if (tlb_flag(TLB_V4_U_FULL))
@@ -292,7 +292,7 @@ flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
 	if (tlb_flag(TLB_WB))
 		asm("mcr%? p15, 0, %0, c7, c10, 4" : : "r" (zero));
 
-	if (vma->vm_mm == current->active_mm) {
+	if (cpu_isset(smp_processor_id(), vma->vm_mm->cpu_vm_mask)) {
 		if (tlb_flag(TLB_V3_PAGE))
 			asm("mcr%? p15, 0, %0, c6, c0, 0" : : "r" (uaddr));
 		if (tlb_flag(TLB_V4_U_PAGE))