Commit e3abb14e authored by Fabio Estevam's avatar Fabio Estevam Committed by Shawn Guo

ARM: dts: imx6sx: Make UART compatible to 'imx6q-uart'

UART on i.MX6SX (like all other i.MX6 SoC variants) has the same
programming model as the 'imx6q-uart' type, so add it to the compatible
UART string.
Signed-off-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 3592374d
...@@ -297,7 +297,8 @@ ecspi4: ecspi@02014000 { ...@@ -297,7 +297,8 @@ ecspi4: ecspi@02014000 {
}; };
uart1: serial@02020000 { uart1: serial@02020000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x02020000 0x4000>; reg = <0x02020000 0x4000>;
interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
...@@ -1053,7 +1054,8 @@ qspi2: qspi@021e4000 { ...@@ -1053,7 +1054,8 @@ qspi2: qspi@021e4000 {
}; };
uart2: serial@021e8000 { uart2: serial@021e8000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021e8000 0x4000>; reg = <0x021e8000 0x4000>;
interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
...@@ -1065,7 +1067,8 @@ uart2: serial@021e8000 { ...@@ -1065,7 +1067,8 @@ uart2: serial@021e8000 {
}; };
uart3: serial@021ec000 { uart3: serial@021ec000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021ec000 0x4000>; reg = <0x021ec000 0x4000>;
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
...@@ -1077,7 +1080,8 @@ uart3: serial@021ec000 { ...@@ -1077,7 +1080,8 @@ uart3: serial@021ec000 {
}; };
uart4: serial@021f0000 { uart4: serial@021f0000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f0000 0x4000>; reg = <0x021f0000 0x4000>;
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
...@@ -1089,7 +1093,8 @@ uart4: serial@021f0000 { ...@@ -1089,7 +1093,8 @@ uart4: serial@021f0000 {
}; };
uart5: serial@021f4000 { uart5: serial@021f4000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x021f4000 0x4000>; reg = <0x021f4000 0x4000>;
interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
...@@ -1229,7 +1234,8 @@ ecspi5: ecspi@0228c000 { ...@@ -1229,7 +1234,8 @@ ecspi5: ecspi@0228c000 {
}; };
uart6: serial@022a0000 { uart6: serial@022a0000 {
compatible = "fsl,imx6sx-uart", "fsl,imx21-uart"; compatible = "fsl,imx6sx-uart",
"fsl,imx6q-uart", "fsl,imx21-uart";
reg = <0x022a0000 0x4000>; reg = <0x022a0000 0x4000>;
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SX_CLK_UART_IPG>, clocks = <&clks IMX6SX_CLK_UART_IPG>,
......
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