Commit e3c3f7cf authored by Dmitry Baryshkov's avatar Dmitry Baryshkov Committed by Vinod Koul

phy: qcom-qmp-usb: remove QPHY_PCS_LFPS_RXTERM_IRQ_STATUS reg

The QPHY_PCS_LFPS_RXTERM_IRQ_STATUS register is not used, remove it from
register layout.
Signed-off-by: default avatarDmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221110192248.873973-10-dmitry.baryshkov@linaro.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 5db22640
...@@ -28,6 +28,7 @@ ...@@ -28,6 +28,7 @@
#define QPHY_V2_PCS_FLL_CNT_VAL_L 0x0c8 #define QPHY_V2_PCS_FLL_CNT_VAL_L 0x0c8
#define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL 0x0cc #define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL 0x0cc
#define QPHY_V2_PCS_FLL_MAN_CODE 0x0d0 #define QPHY_V2_PCS_FLL_MAN_CODE 0x0d0
#define QPHY_V2_PCS_LFPS_RXTERM_IRQ_STATUS 0x178
#define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB 0x1a8 #define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB 0x1a8
#define QPHY_V2_PCS_OSC_DTCT_ACTIONS 0x1ac #define QPHY_V2_PCS_OSC_DTCT_ACTIONS 0x1ac
#define QPHY_V2_PCS_RX_SIGDET_LVL 0x1d8 #define QPHY_V2_PCS_RX_SIGDET_LVL 0x1d8
......
...@@ -54,9 +54,6 @@ ...@@ -54,9 +54,6 @@
/* QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR register bits */ /* QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR register bits */
#define IRQ_CLEAR BIT(0) #define IRQ_CLEAR BIT(0)
/* QPHY_PCS_LFPS_RXTERM_IRQ_STATUS register bits */
#define RCVR_DETECT BIT(0)
/* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */ /* QPHY_V3_PCS_MISC_CLAMP_ENABLE register bits */
#define CLAMP_EN BIT(0) /* enables i/o clamp_n */ #define CLAMP_EN BIT(0) /* enables i/o clamp_n */
...@@ -94,7 +91,6 @@ enum qphy_reg_layout { ...@@ -94,7 +91,6 @@ enum qphy_reg_layout {
QPHY_PCS_STATUS, QPHY_PCS_STATUS,
QPHY_PCS_AUTONOMOUS_MODE_CTRL, QPHY_PCS_AUTONOMOUS_MODE_CTRL,
QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR, QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR,
QPHY_PCS_LFPS_RXTERM_IRQ_STATUS,
QPHY_PCS_POWER_DOWN_CONTROL, QPHY_PCS_POWER_DOWN_CONTROL,
/* PCS_MISC registers */ /* PCS_MISC registers */
QPHY_PCS_MISC_TYPEC_CTRL, QPHY_PCS_MISC_TYPEC_CTRL,
...@@ -108,7 +104,6 @@ static const unsigned int usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { ...@@ -108,7 +104,6 @@ static const unsigned int usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
[QPHY_PCS_STATUS] = 0x17c, [QPHY_PCS_STATUS] = 0x17c,
[QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d4, [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d4,
[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x0d8, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x0d8,
[QPHY_PCS_LFPS_RXTERM_IRQ_STATUS] = 0x178,
[QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04,
}; };
...@@ -118,7 +113,6 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = { ...@@ -118,7 +113,6 @@ static const unsigned int qmp_v3_usb3phy_regs_layout[QPHY_LAYOUT_SIZE] = {
[QPHY_PCS_STATUS] = 0x174, [QPHY_PCS_STATUS] = 0x174,
[QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d8, [QPHY_PCS_AUTONOMOUS_MODE_CTRL] = 0x0d8,
[QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x0dc, [QPHY_PCS_LFPS_RXTERM_IRQ_CLEAR] = 0x0dc,
[QPHY_PCS_LFPS_RXTERM_IRQ_STATUS] = 0x170,
[QPHY_PCS_POWER_DOWN_CONTROL] = 0x04, [QPHY_PCS_POWER_DOWN_CONTROL] = 0x04,
}; };
......
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