Commit e3c76cab authored by Linus Torvalds's avatar Linus Torvalds

Merge http://linux-acpi.bkbits.net/linux-acpi

into home.transmeta.com:/home/torvalds/v2.5/linux
parents 462bcde6 33322ec6
...@@ -247,7 +247,7 @@ static ide_startstop_t write_intr (ide_drive_t *drive) ...@@ -247,7 +247,7 @@ static ide_startstop_t write_intr (ide_drive_t *drive)
* *
* Returns 0 on success. * Returns 0 on success.
* *
* Note that we may be called from two contexts - the do_rw_disk context * Note that we may be called from two contexts - __ide_do_rw_disk() context
* and IRQ context. The IRQ can happen any time after we've output the * and IRQ context. The IRQ can happen any time after we've output the
* full "mcount" number of sectors, so we must make sure we update the * full "mcount" number of sectors, so we must make sure we update the
* state _before_ we output the final part of the data! * state _before_ we output the final part of the data!
...@@ -351,11 +351,11 @@ static ide_startstop_t multwrite_intr (ide_drive_t *drive) ...@@ -351,11 +351,11 @@ static ide_startstop_t multwrite_intr (ide_drive_t *drive)
} }
/* /*
* do_rw_disk() issues READ and WRITE commands to a disk, * __ide_do_rw_disk() issues READ and WRITE commands to a disk,
* using LBA if supported, or CHS otherwise, to address sectors. * using LBA if supported, or CHS otherwise, to address sectors.
* It also takes care of issuing special DRIVE_CMDs. * It also takes care of issuing special DRIVE_CMDs.
*/ */
static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, sector_t block) ide_startstop_t __ide_do_rw_disk (ide_drive_t *drive, struct request *rq, sector_t block)
{ {
ide_hwif_t *hwif = HWIF(drive); ide_hwif_t *hwif = HWIF(drive);
u8 lba48 = (drive->addressing == 1) ? 1 : 0; u8 lba48 = (drive->addressing == 1) ? 1 : 0;
...@@ -367,11 +367,6 @@ static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, secto ...@@ -367,11 +367,6 @@ static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, secto
if (driver_blocked) if (driver_blocked)
panic("Request while ide driver is blocked?"); panic("Request while ide driver is blocked?");
#if defined(CONFIG_BLK_DEV_PDC4030) || defined(CONFIG_BLK_DEV_PDC4030_MODULE)
if (IS_PDC4030_DRIVE)
return promise_rw_disk(drive, rq, block);
#endif /* CONFIG_BLK_DEV_PDC4030 */
if (drive->using_tcq && idedisk_start_tag(drive, rq)) { if (drive->using_tcq && idedisk_start_tag(drive, rq)) {
if (!ata_pending_commands(drive)) if (!ata_pending_commands(drive))
BUG(); BUG();
...@@ -550,10 +545,11 @@ static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, secto ...@@ -550,10 +545,11 @@ static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, secto
} }
return ide_started; return ide_started;
} }
blk_dump_rq_flags(rq, "do_rw_disk - bad command"); blk_dump_rq_flags(rq, "__ide_do_rw_disk - bad command");
ide_end_request(drive, 0, 0); ide_end_request(drive, 0, 0);
return ide_stopped; return ide_stopped;
} }
EXPORT_SYMBOL_GPL(__ide_do_rw_disk);
#else /* CONFIG_IDE_TASKFILE_IO */ #else /* CONFIG_IDE_TASKFILE_IO */
...@@ -562,15 +558,15 @@ static ide_startstop_t lba_28_rw_disk(ide_drive_t *, struct request *, unsigned ...@@ -562,15 +558,15 @@ static ide_startstop_t lba_28_rw_disk(ide_drive_t *, struct request *, unsigned
static ide_startstop_t lba_48_rw_disk(ide_drive_t *, struct request *, unsigned long long); static ide_startstop_t lba_48_rw_disk(ide_drive_t *, struct request *, unsigned long long);
/* /*
* do_rw_disk() issues READ and WRITE commands to a disk, * __ide_do_rw_disk() issues READ and WRITE commands to a disk,
* using LBA if supported, or CHS otherwise, to address sectors. * using LBA if supported, or CHS otherwise, to address sectors.
* It also takes care of issuing special DRIVE_CMDs. * It also takes care of issuing special DRIVE_CMDs.
*/ */
static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, sector_t block) ide_startstop_t __ide_do_rw_disk (ide_drive_t *drive, struct request *rq, sector_t block)
{ {
BUG_ON(drive->blocked); BUG_ON(drive->blocked);
if (!blk_fs_request(rq)) { if (!blk_fs_request(rq)) {
blk_dump_rq_flags(rq, "do_rw_disk - bad command"); blk_dump_rq_flags(rq, "__ide_do_rw_disk - bad command");
ide_end_request(drive, 0, 0); ide_end_request(drive, 0, 0);
return ide_stopped; return ide_stopped;
} }
...@@ -581,11 +577,6 @@ static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, secto ...@@ -581,11 +577,6 @@ static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, secto
* need to add split taskfile operations based on 28bit threshold. * need to add split taskfile operations based on 28bit threshold.
*/ */
#if defined(CONFIG_BLK_DEV_PDC4030) || defined(CONFIG_BLK_DEV_PDC4030_MODULE)
if (IS_PDC4030_DRIVE)
return promise_rw_disk(drive, rq, block);
#endif /* CONFIG_BLK_DEV_PDC4030 */
if (drive->using_tcq && idedisk_start_tag(drive, rq)) { if (drive->using_tcq && idedisk_start_tag(drive, rq)) {
if (!ata_pending_commands(drive)) if (!ata_pending_commands(drive))
BUG(); BUG();
...@@ -601,6 +592,7 @@ static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, secto ...@@ -601,6 +592,7 @@ static ide_startstop_t do_rw_disk (ide_drive_t *drive, struct request *rq, secto
/* 28-bit CHS : DIE DIE DIE piece of legacy crap!!! */ /* 28-bit CHS : DIE DIE DIE piece of legacy crap!!! */
return chs_rw_disk(drive, rq, (unsigned long) block); return chs_rw_disk(drive, rq, (unsigned long) block);
} }
EXPORT_SYMBOL_GPL(__ide_do_rw_disk);
static task_ioreg_t get_command (ide_drive_t *drive, int cmd) static task_ioreg_t get_command (ide_drive_t *drive, int cmd)
{ {
...@@ -760,6 +752,16 @@ static ide_startstop_t lba_48_rw_disk (ide_drive_t *drive, struct request *rq, u ...@@ -760,6 +752,16 @@ static ide_startstop_t lba_48_rw_disk (ide_drive_t *drive, struct request *rq, u
#endif /* CONFIG_IDE_TASKFILE_IO */ #endif /* CONFIG_IDE_TASKFILE_IO */
static ide_startstop_t ide_do_rw_disk (ide_drive_t *drive, struct request *rq, sector_t block)
{
ide_hwif_t *hwif = HWIF(drive);
if (hwif->rw_disk)
return hwif->rw_disk(drive, rq, block);
else
return __ide_do_rw_disk(drive, rq, block);
}
static int do_idedisk_flushcache(ide_drive_t *drive); static int do_idedisk_flushcache(ide_drive_t *drive);
static u8 idedisk_dump_status (ide_drive_t *drive, const char *msg, u8 stat) static u8 idedisk_dump_status (ide_drive_t *drive, const char *msg, u8 stat)
...@@ -1541,11 +1543,6 @@ static void idedisk_setup (ide_drive_t *drive) ...@@ -1541,11 +1543,6 @@ static void idedisk_setup (ide_drive_t *drive)
struct hd_driveid *id = drive->id; struct hd_driveid *id = drive->id;
unsigned long capacity; unsigned long capacity;
#if 0
if (IS_PDC4030_DRIVE)
DRIVER(drive)->do_request = promise_rw_disk;
#endif
idedisk_add_settings(drive); idedisk_add_settings(drive);
if (drive->id_read == 0) if (drive->id_read == 0)
...@@ -1674,7 +1671,7 @@ static ide_driver_t idedisk_driver = { ...@@ -1674,7 +1671,7 @@ static ide_driver_t idedisk_driver = {
.supports_dsc_overlap = 0, .supports_dsc_overlap = 0,
.cleanup = idedisk_cleanup, .cleanup = idedisk_cleanup,
.flushcache = do_idedisk_flushcache, .flushcache = do_idedisk_flushcache,
.do_request = do_rw_disk, .do_request = ide_do_rw_disk,
.sense = idedisk_dump_status, .sense = idedisk_dump_status,
.error = idedisk_error, .error = idedisk_error,
.abort = idedisk_abort, .abort = idedisk_abort,
......
...@@ -913,6 +913,8 @@ int ide_register_hw (hw_regs_t *hw, ide_hwif_t **hwifp) ...@@ -913,6 +913,8 @@ int ide_register_hw (hw_regs_t *hw, ide_hwif_t **hwifp)
} }
for (index = 0; index < MAX_HWIFS; ++index) { for (index = 0; index < MAX_HWIFS; ++index) {
hwif = &ide_hwifs[index]; hwif = &ide_hwifs[index];
if (hwif->hold)
continue;
if ((!hwif->present && !hwif->mate && !initializing) || if ((!hwif->present && !hwif->mate && !initializing) ||
(!hwif->hw.io_ports[IDE_DATA_OFFSET] && initializing)) (!hwif->hw.io_ports[IDE_DATA_OFFSET] && initializing))
goto found; goto found;
...@@ -924,6 +926,8 @@ int ide_register_hw (hw_regs_t *hw, ide_hwif_t **hwifp) ...@@ -924,6 +926,8 @@ int ide_register_hw (hw_regs_t *hw, ide_hwif_t **hwifp)
found: found:
if (hwif->present) if (hwif->present)
ide_unregister(index); ide_unregister(index);
else if (!hwif->hold)
init_hwif_data(index);
if (hwif->present) if (hwif->present)
return -1; return -1;
memcpy(&hwif->hw, hw, sizeof(*hw)); memcpy(&hwif->hw, hw, sizeof(*hw));
......
...@@ -54,13 +54,7 @@ ...@@ -54,13 +54,7 @@
#include <asm/io.h> #include <asm/io.h>
#ifdef CONFIG_BLK_DEV_ALI14XX_MODULE #include "ide_modes.h"
# define _IDE_C
# include "ide_modes.h"
# undef _IDE_C
#else
# include "ide_modes.h"
#endif /* CONFIG_BLK_DEV_ALI14XX_MODULE */
/* port addresses for auto-detection */ /* port addresses for auto-detection */
#define ALI_NUM_PORTS 4 #define ALI_NUM_PORTS 4
......
...@@ -21,13 +21,7 @@ ...@@ -21,13 +21,7 @@
#include <asm/io.h> #include <asm/io.h>
#ifdef CONFIG_BLK_DEV_DTC2278_MODULE #include "ide_modes.h"
# define _IDE_C
# include "ide_modes.h"
# undef _IDE_C
#else
# include "ide_modes.h"
#endif /* CONFIG_BLK_DEV_DTC2278_MODULE */
/* /*
* Changing this #undef to #define may solve start up problems in some systems. * Changing this #undef to #define may solve start up problems in some systems.
......
...@@ -53,13 +53,7 @@ ...@@ -53,13 +53,7 @@
#include <asm/io.h> #include <asm/io.h>
#ifdef CONFIG_BLK_DEV_HT6560B_MODULE #include "ide_modes.h"
# define _IDE_C
# include "ide_modes.h"
# undef _IDE_C
#else
# include "ide_modes.h"
#endif /* CONFIG_BLK_DEV_HT6560B_MODULE */
/* #define DEBUG */ /* remove comments for DEBUG messages */ /* #define DEBUG */ /* remove comments for DEBUG messages */
......
...@@ -94,6 +94,8 @@ ...@@ -94,6 +94,8 @@
#include "pdc4030.h" #include "pdc4030.h"
static ide_startstop_t promise_rw_disk (ide_drive_t *drive, struct request *rq, unsigned long block);
/* /*
* promise_selectproc() is invoked by ide.c * promise_selectproc() is invoked by ide.c
* in preparation for access to the specified drive. * in preparation for access to the specified drive.
...@@ -231,6 +233,10 @@ int __init setup_pdc4030(ide_hwif_t *hwif) ...@@ -231,6 +233,10 @@ int __init setup_pdc4030(ide_hwif_t *hwif)
/* DC4030 hosted drives need their own identify... */ /* DC4030 hosted drives need their own identify... */
hwif->identify = hwif2->identify = &pdc4030_identify; hwif->identify = hwif2->identify = &pdc4030_identify;
/* Override the normal ide disk read/write. */
hwif->rw_disk = promise_rw_disk;
hwif2->rw_disk = promise_rw_disk;
/* Shift the remaining interfaces up by one */ /* Shift the remaining interfaces up by one */
for (i=MAX_HWIFS-1 ; i > hwif->index+1 ; i--) { for (i=MAX_HWIFS-1 ; i > hwif->index+1 ; i--) {
ide_hwif_t *h = &ide_hwifs[i]; ide_hwif_t *h = &ide_hwifs[i];
...@@ -803,7 +809,7 @@ ide_startstop_t do_pdc4030_io (ide_drive_t *drive, ide_task_t *task) ...@@ -803,7 +809,7 @@ ide_startstop_t do_pdc4030_io (ide_drive_t *drive, ide_task_t *task)
} }
} }
ide_startstop_t promise_rw_disk (ide_drive_t *drive, struct request *rq, unsigned long block) static ide_startstop_t promise_rw_disk (ide_drive_t *drive, struct request *rq, unsigned long block)
{ {
/* The four drives on the two logical (one physical) interfaces /* The four drives on the two logical (one physical) interfaces
are distinguished by writing the drive number (0-3) to the are distinguished by writing the drive number (0-3) to the
......
...@@ -42,14 +42,7 @@ ...@@ -42,14 +42,7 @@
#include <asm/system.h> #include <asm/system.h>
#include <asm/io.h> #include <asm/io.h>
#ifdef CONFIG_BLK_DEV_QD65XX_MODULE #include "ide_modes.h"
# define _IDE_C
# include "ide_modes.h"
# undef _IDE_C
#else
# include "ide_modes.h"
#endif /* CONFIG_BLK_DEV_QD65XX_MODULE */
#include "qd65xx.h" #include "qd65xx.h"
/* /*
......
...@@ -54,13 +54,7 @@ ...@@ -54,13 +54,7 @@
#include <asm/io.h> #include <asm/io.h>
#ifdef CONFIG_BLK_DEV_UMC8672_MODULE #include "ide_modes.h"
# define _IDE_C
# include "ide_modes.h"
# undef _IDE_C
#else
# include "ide_modes.h"
#endif /* CONFIG_BLK_DEV_UMC8672_MODULE */
/* /*
* Default speeds. These can be changed with "auto-tune" and/or hdparm. * Default speeds. These can be changed with "auto-tune" and/or hdparm.
......
...@@ -313,7 +313,8 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char ...@@ -313,7 +313,8 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char
case AMD_UDMA_100: case AMD_UDMA_100:
pci_read_config_byte(dev, AMD_CABLE_DETECT, &t); pci_read_config_byte(dev, AMD_CABLE_DETECT, &t);
amd_80w = ((u & 0x3) ? 1 : 0) | ((u & 0xc) ? 2 : 0); pci_read_config_dword(dev, AMD_UDMA_TIMING, &u);
amd_80w = ((t & 0x3) ? 1 : 0) | ((t & 0xc) ? 2 : 0);
for (i = 24; i >= 0; i -= 8) for (i = 24; i >= 0; i -= 8)
if (((u >> i) & 4) && !(amd_80w & (1 << (1 - (i >> 4))))) { if (((u >> i) & 4) && !(amd_80w & (1 << (1 - (i >> 4))))) {
printk(KERN_WARNING "AMD_IDE: Bios didn't set cable bits correctly. Enabling workaround.\n"); printk(KERN_WARNING "AMD_IDE: Bios didn't set cable bits correctly. Enabling workaround.\n");
...@@ -383,11 +384,6 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char ...@@ -383,11 +384,6 @@ static unsigned int __init init_chipset_amd74xx(struct pci_dev *dev, const char
return 0; return 0;
} }
static unsigned int __init ata66_amd74xx(ide_hwif_t *hwif)
{
return ((amd_enabled & amd_80w) >> hwif->channel) & 1;
}
static void __init init_hwif_amd74xx(ide_hwif_t *hwif) static void __init init_hwif_amd74xx(ide_hwif_t *hwif)
{ {
int i; int i;
......
...@@ -40,7 +40,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -40,7 +40,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
.init_dma = init_dma_amd74xx, .init_dma = init_dma_amd74xx,
.channels = 2, .channels = 2,
.autodma = AUTODMA, .autodma = AUTODMA,
.enablebits = {{0x40,0x01,0x01}, {0x40,0x02,0x02}}, .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
.bootable = ON_BOARD, .bootable = ON_BOARD,
.extra = 0 .extra = 0
},{ /* 1 */ },{ /* 1 */
...@@ -53,7 +53,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -53,7 +53,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
.init_dma = init_dma_amd74xx, .init_dma = init_dma_amd74xx,
.channels = 2, .channels = 2,
.autodma = AUTODMA, .autodma = AUTODMA,
.enablebits = {{0x40,0x01,0x01}, {0x40,0x02,0x02}}, .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
.bootable = ON_BOARD, .bootable = ON_BOARD,
.extra = 0 .extra = 0
},{ /* 2 */ },{ /* 2 */
...@@ -66,7 +66,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -66,7 +66,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
.init_dma = init_dma_amd74xx, .init_dma = init_dma_amd74xx,
.channels = 2, .channels = 2,
.autodma = AUTODMA, .autodma = AUTODMA,
.enablebits = {{0x40,0x01,0x01}, {0x40,0x02,0x02}}, .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
.bootable = ON_BOARD, .bootable = ON_BOARD,
.extra = 0 .extra = 0
},{ /* 3 */ },{ /* 3 */
...@@ -79,7 +79,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -79,7 +79,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
.init_dma = init_dma_amd74xx, .init_dma = init_dma_amd74xx,
.channels = 2, .channels = 2,
.autodma = AUTODMA, .autodma = AUTODMA,
.enablebits = {{0x40,0x01,0x01}, {0x40,0x02,0x02}}, .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
.bootable = ON_BOARD, .bootable = ON_BOARD,
.extra = 0 .extra = 0
},{ /* 4 */ },{ /* 4 */
...@@ -92,7 +92,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -92,7 +92,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
.init_dma = init_dma_amd74xx, .init_dma = init_dma_amd74xx,
.autodma = AUTODMA, .autodma = AUTODMA,
.channels = 2, .channels = 2,
.enablebits = {{0x40,0x01,0x01}, {0x40,0x02,0x02}}, .enablebits = {{0x40,0x02,0x02}, {0x40,0x01,0x01}},
.bootable = ON_BOARD, .bootable = ON_BOARD,
.extra = 0 .extra = 0
}, },
...@@ -106,7 +106,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -106,7 +106,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
.init_dma = init_dma_amd74xx, .init_dma = init_dma_amd74xx,
.channels = 2, .channels = 2,
.autodma = AUTODMA, .autodma = AUTODMA,
.enablebits = {{0x50,0x01,0x01}, {0x50,0x02,0x02}}, .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
.bootable = ON_BOARD, .bootable = ON_BOARD,
.extra = 0, .extra = 0,
}, },
...@@ -120,7 +120,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = { ...@@ -120,7 +120,7 @@ static ide_pci_device_t amd74xx_chipsets[] __devinitdata = {
.init_dma = init_dma_amd74xx, .init_dma = init_dma_amd74xx,
.channels = 2, .channels = 2,
.autodma = AUTODMA, .autodma = AUTODMA,
.enablebits = {{0x50,0x01,0x01}, {0x50,0x02,0x02}}, .enablebits = {{0x50,0x02,0x02}, {0x50,0x01,0x01}},
.bootable = ON_BOARD, .bootable = ON_BOARD,
.extra = 0, .extra = 0,
}, },
......
...@@ -142,6 +142,9 @@ static int piix_get_info (char *buffer, char **addr, off_t offset, int count) ...@@ -142,6 +142,9 @@ static int piix_get_info (char *buffer, char **addr, off_t offset, int count)
p += sprintf(p, "\nController: %d\n", i); p += sprintf(p, "\nController: %d\n", i);
p += sprintf(p, "\n Intel "); p += sprintf(p, "\n Intel ");
switch(dev->device) { switch(dev->device) {
case PCI_DEVICE_ID_INTEL_82801EB_1:
p += sprintf(p, "PIIX4 SATA 150 ");
break;
case PCI_DEVICE_ID_INTEL_82801BA_8: case PCI_DEVICE_ID_INTEL_82801BA_8:
case PCI_DEVICE_ID_INTEL_82801BA_9: case PCI_DEVICE_ID_INTEL_82801BA_9:
case PCI_DEVICE_ID_INTEL_82801CA_10: case PCI_DEVICE_ID_INTEL_82801CA_10:
...@@ -275,6 +278,9 @@ static u8 piix_ratemask (ide_drive_t *drive) ...@@ -275,6 +278,9 @@ static u8 piix_ratemask (ide_drive_t *drive)
u8 mode; u8 mode;
switch(dev->device) { switch(dev->device) {
case PCI_DEVICE_ID_INTEL_82801EB_1:
mode = 3;
break;
/* UDMA 100 capable */ /* UDMA 100 capable */
case PCI_DEVICE_ID_INTEL_82801BA_8: case PCI_DEVICE_ID_INTEL_82801BA_8:
case PCI_DEVICE_ID_INTEL_82801BA_9: case PCI_DEVICE_ID_INTEL_82801BA_9:
...@@ -325,6 +331,7 @@ static u8 piix_ratemask (ide_drive_t *drive) ...@@ -325,6 +331,7 @@ static u8 piix_ratemask (ide_drive_t *drive)
static u8 piix_dma_2_pio (u8 xfer_rate) { static u8 piix_dma_2_pio (u8 xfer_rate) {
switch(xfer_rate) { switch(xfer_rate) {
case XFER_UDMA_6:
case XFER_UDMA_5: case XFER_UDMA_5:
case XFER_UDMA_4: case XFER_UDMA_4:
case XFER_UDMA_3: case XFER_UDMA_3:
...@@ -603,6 +610,7 @@ static int piix_config_drive_xfer_rate (ide_drive_t *drive) ...@@ -603,6 +610,7 @@ static int piix_config_drive_xfer_rate (ide_drive_t *drive)
static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char *name) static unsigned int __devinit init_chipset_piix (struct pci_dev *dev, const char *name)
{ {
switch(dev->device) { switch(dev->device) {
case PCI_DEVICE_ID_INTEL_82801EB_1:
case PCI_DEVICE_ID_INTEL_82801AA_1: case PCI_DEVICE_ID_INTEL_82801AA_1:
case PCI_DEVICE_ID_INTEL_82801AB_1: case PCI_DEVICE_ID_INTEL_82801AB_1:
case PCI_DEVICE_ID_INTEL_82801BA_8: case PCI_DEVICE_ID_INTEL_82801BA_8:
...@@ -803,6 +811,7 @@ static struct pci_device_id piix_pci_tbl[] __devinitdata = { ...@@ -803,6 +811,7 @@ static struct pci_device_id piix_pci_tbl[] __devinitdata = {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_11,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_11,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 15},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_11, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801E_11, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 16},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_10,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17}, { PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_10,PCI_ANY_ID, PCI_ANY_ID, 0, 0, 17},
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801EB_1, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 18},
{ 0, }, { 0, },
}; };
......
...@@ -291,10 +291,10 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = { ...@@ -291,10 +291,10 @@ static ide_pci_device_t piix_pci_info[] __devinitdata = {
.enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}}, .enablebits = {{0x41,0x80,0x80}, {0x43,0x80,0x80}},
.bootable = ON_BOARD, .bootable = ON_BOARD,
.extra = 0, .extra = 0,
},{ /* 17 */ },{ /* 18 */
.vendor = PCI_VENDOR_ID_INTEL, .vendor = PCI_VENDOR_ID_INTEL,
.device = PCI_DEVICE_ID_INTEL_82801DB_10, .device = PCI_DEVICE_ID_INTEL_82801EB_1,
.name = "ICH4", .name = "ICH5-SATA",
.init_setup = init_setup_piix, .init_setup = init_setup_piix,
.init_chipset = init_chipset_piix, .init_chipset = init_chipset_piix,
.init_iops = NULL, .init_iops = NULL,
......
/* /*
* linux/drivers/ide/pci/serverworks.c Version 0.7 10 Sept 2002 * linux/drivers/ide/pci/serverworks.c Version 0.8 25 Ebr 2003
* *
* Copyright (C) 1998-2000 Michel Aubry * Copyright (C) 1998-2000 Michel Aubry
* Copyright (C) 1998-2000 Andrzej Krzysztofowicz * Copyright (C) 1998-2000 Andrzej Krzysztofowicz
...@@ -203,11 +203,22 @@ static int svwks_get_info (char *buffer, char **addr, off_t offset, int count) ...@@ -203,11 +203,22 @@ static int svwks_get_info (char *buffer, char **addr, off_t offset, int count)
} }
#endif /* defined(DISPLAY_SVWKS_TIMINGS) && defined(CONFIG_PROC_FS) */ #endif /* defined(DISPLAY_SVWKS_TIMINGS) && defined(CONFIG_PROC_FS) */
static int check_in_drive_lists (ide_drive_t *drive, const char **list)
{
while (*list)
if (!strcmp(*list++, drive->id->model))
return 1;
return 0;
}
static u8 svwks_ratemask (ide_drive_t *drive) static u8 svwks_ratemask (ide_drive_t *drive)
{ {
struct pci_dev *dev = HWIF(drive)->pci_dev; struct pci_dev *dev = HWIF(drive)->pci_dev;
u8 mode; u8 mode;
if (!svwks_revision)
pci_read_config_byte(dev, PCI_REVISION_ID, &svwks_revision);
if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) { if (dev->device == PCI_DEVICE_ID_SERVERWORKS_OSB4IDE) {
u32 reg = 0; u32 reg = 0;
if (isa_dev) if (isa_dev)
...@@ -225,9 +236,13 @@ static u8 svwks_ratemask (ide_drive_t *drive) ...@@ -225,9 +236,13 @@ static u8 svwks_ratemask (ide_drive_t *drive)
} else if (svwks_revision >= SVWKS_CSB5_REVISION_NEW) { } else if (svwks_revision >= SVWKS_CSB5_REVISION_NEW) {
u8 btr = 0; u8 btr = 0;
pci_read_config_byte(dev, 0x5A, &btr); pci_read_config_byte(dev, 0x5A, &btr);
mode = btr; mode = btr & 0x3;
if (!eighty_ninty_three(drive)) if (!eighty_ninty_three(drive))
mode = min(mode, (u8)1); mode = min(mode, (u8)1);
/* If someone decides to do UDMA133 on CSB5 the same
issue will bite so be inclusive */
if (mode > 2 && check_in_drive_lists(drive, svwks_bad_ata100))
mode = 2;
} }
if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) || if (((dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE) ||
(dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) && (dev->device == PCI_DEVICE_ID_SERVERWORKS_CSB6IDE2)) &&
...@@ -419,13 +434,10 @@ static void config_chipset_for_pio (ide_drive_t *drive) ...@@ -419,13 +434,10 @@ static void config_chipset_for_pio (ide_drive_t *drive)
static void svwks_tune_drive (ide_drive_t *drive, u8 pio) static void svwks_tune_drive (ide_drive_t *drive, u8 pio)
{ {
/* Tune to desired value or to "best". We must not adjust if(pio == 255)
"best" when we adjust from pio numbers to rate values! */
if(pio != 255)
(void) svwks_tune_chipset(drive, (XFER_PIO_0 + pio));
else
(void) svwks_tune_chipset(drive, 255); (void) svwks_tune_chipset(drive, 255);
else
(void) svwks_tune_chipset(drive, (XFER_PIO_0 + pio));
} }
static int config_chipset_for_dma (ide_drive_t *drive) static int config_chipset_for_dma (ide_drive_t *drive)
...@@ -446,7 +458,7 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive) ...@@ -446,7 +458,7 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
drive->init_speed = 0; drive->init_speed = 0;
if (id && (id->capability & 1) && drive->autodma) { if ((id->capability & 1) && drive->autodma) {
/* Consult the list of known "bad" drives */ /* Consult the list of known "bad" drives */
if (hwif->ide_dma_bad_drive(drive)) if (hwif->ide_dma_bad_drive(drive))
goto fast_ata_pio; goto fast_ata_pio;
...@@ -483,28 +495,10 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive) ...@@ -483,28 +495,10 @@ static int svwks_config_drive_xfer_rate (ide_drive_t *drive)
return hwif->ide_dma_on(drive); return hwif->ide_dma_on(drive);
} }
/* This can go soon */
static int svwks_ide_dma_end (ide_drive_t *drive) static int svwks_ide_dma_end (ide_drive_t *drive)
{ {
/*
* We never place the OSB4 into a UDMA mode with a disk
* medium, that means the UDMA "all my data is 4 byte shifted"
* problem cannot occur.
*/
#if 0
ide_hwif_t *hwif = HWIF(drive);
u8 dma_stat = hwif->INB(hwif->dma_status);
if ((dma_stat & 1) && drive->media == ide_disk)
{
printk(KERN_CRIT "Serverworks OSB4 in impossible state.\n");
printk(KERN_CRIT "Disable UDMA or if you are using Seagate then try switching disk types\n");
printk(KERN_CRIT "on this controller. Please report this event to osb4-bug@ide.cabal.tm\n");
/* Panic might sys_sync -> death by corrupt disk */
printk(KERN_CRIT "OSB4: continuing might cause disk corruption.\n");
while(1)
cpu_relax();
}
#endif
return __ide_dma_end(drive); return __ide_dma_end(drive);
} }
...@@ -630,8 +624,6 @@ static unsigned int __init init_chipset_svwks (struct pci_dev *dev, const char * ...@@ -630,8 +624,6 @@ static unsigned int __init init_chipset_svwks (struct pci_dev *dev, const char *
static unsigned int __init ata66_svwks_svwks (ide_hwif_t *hwif) static unsigned int __init ata66_svwks_svwks (ide_hwif_t *hwif)
{ {
// struct pci_dev *dev = hwif->pci_dev;
// return 0;
return 1; return 1;
} }
......
...@@ -11,6 +11,16 @@ ...@@ -11,6 +11,16 @@
#define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */ #define SVWKS_CSB5_REVISION_NEW 0x92 /* min PCI_REVISION_ID for UDMA5 (A2.0) */
#define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */ #define SVWKS_CSB6_REVISION 0xa0 /* min PCI_REVISION_ID for UDMA4 (A1.0) */
/* Seagate Barracuda ATA IV Family drives in UDMA mode 5
* can overrun their FIFOs when used with the CSB5 */
const char *svwks_bad_ata100[] = {
"ST320011A",
"ST340016A",
"ST360021A",
"ST380021A",
NULL
};
#define DISPLAY_SVWKS_TIMINGS 1 #define DISPLAY_SVWKS_TIMINGS 1
#if defined(DISPLAY_SVWKS_TIMINGS) && defined(CONFIG_PROC_FS) #if defined(DISPLAY_SVWKS_TIMINGS) && defined(CONFIG_PROC_FS)
......
...@@ -161,9 +161,10 @@ static const struct { ...@@ -161,9 +161,10 @@ static const struct {
{ "SiS748", PCI_DEVICE_ID_SI_748, ATA_133, 0 }, { "SiS748", PCI_DEVICE_ID_SI_748, ATA_133, 0 },
{ "SiS746", PCI_DEVICE_ID_SI_746, ATA_133, 0 }, { "SiS746", PCI_DEVICE_ID_SI_746, ATA_133, 0 },
{ "SiS745", PCI_DEVICE_ID_SI_745, ATA_133, 0 }, { "SiS745", PCI_DEVICE_ID_SI_745, ATA_133, 0 },
{ "SiS740", PCI_DEVICE_ID_SI_740, ATA_100, 0 }, { "SiS740", PCI_DEVICE_ID_SI_740, ATA_133, 0 },
{ "SiS735", PCI_DEVICE_ID_SI_735, ATA_100, SIS5513_LATENCY }, { "SiS735", PCI_DEVICE_ID_SI_735, ATA_100, SIS5513_LATENCY },
{ "SiS730", PCI_DEVICE_ID_SI_730, ATA_100a, SIS5513_LATENCY }, { "SiS730", PCI_DEVICE_ID_SI_730, ATA_100a, SIS5513_LATENCY },
{ "SiS655", PCI_DEVICE_ID_SI_655, ATA_133, 0 },
{ "SiS652", PCI_DEVICE_ID_SI_652, ATA_133, 0 }, { "SiS652", PCI_DEVICE_ID_SI_652, ATA_133, 0 },
{ "SiS651", PCI_DEVICE_ID_SI_651, ATA_133, 0 }, { "SiS651", PCI_DEVICE_ID_SI_651, ATA_133, 0 },
{ "SiS650", PCI_DEVICE_ID_SI_650, ATA_133, 0 }, { "SiS650", PCI_DEVICE_ID_SI_650, ATA_133, 0 },
...@@ -257,8 +258,8 @@ static struct pci_dev *host_dev = NULL; ...@@ -257,8 +258,8 @@ static struct pci_dev *host_dev = NULL;
static char* chipset_capability[] = { static char* chipset_capability[] = {
"ATA", "ATA 16", "ATA", "ATA 16",
"ATA 33", "ATA 66", "ATA 33", "ATA 66",
"ATA 100", "ATA 100", "ATA 100 (1st gen)", "ATA 100 (2nd gen)",
"ATA 133", "ATA 133" "ATA 133 (1st gen)", "ATA 133 (2nd gen)"
}; };
#if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS) #if defined(DISPLAY_SIS_TIMINGS) && defined(CONFIG_PROC_FS)
...@@ -331,8 +332,8 @@ static char* get_drives_info (char *buffer, u8 pos) ...@@ -331,8 +332,8 @@ static char* get_drives_info (char *buffer, u8 pos)
// Configuration space remapped to 0x70 // Configuration space remapped to 0x70
drive_pci = 0x70; drive_pci = 0x70;
} }
pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+8*pos, &regdw0); pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos, &regdw0);
pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+8*pos+4, &regdw1); pci_read_config_dword(bmide_dev, (unsigned long)drive_pci+4*pos+8, &regdw1);
p += sprintf(p, "Drive %d:\n", pos); p += sprintf(p, "Drive %d:\n", pos);
} }
...@@ -357,8 +358,7 @@ static char* get_drives_info (char *buffer, u8 pos) ...@@ -357,8 +358,7 @@ static char* get_drives_info (char *buffer, u8 pos)
case ATA_100a: p += sprintf(p, cycle_time[(reg01 & 0x70) >> 4]); break; case ATA_100a: p += sprintf(p, cycle_time[(reg01 & 0x70) >> 4]); break;
case ATA_100: case ATA_100:
case ATA_133a: p += sprintf(p, cycle_time[reg01 & 0x0F]); break; case ATA_133a: p += sprintf(p, cycle_time[reg01 & 0x0F]); break;
case ATA_133: default: p += sprintf(p, "?"); break;
default: p += sprintf(p, "133+ ?"); break;
} }
p += sprintf(p, " \t UDMA Cycle Time "); p += sprintf(p, " \t UDMA Cycle Time ");
switch(chipset_family) { switch(chipset_family) {
...@@ -367,42 +367,39 @@ static char* get_drives_info (char *buffer, u8 pos) ...@@ -367,42 +367,39 @@ static char* get_drives_info (char *buffer, u8 pos)
case ATA_100a: p += sprintf(p, cycle_time[(reg11 & 0x70) >> 4]); break; case ATA_100a: p += sprintf(p, cycle_time[(reg11 & 0x70) >> 4]); break;
case ATA_100: case ATA_100:
case ATA_133a: p += sprintf(p, cycle_time[reg11 & 0x0F]); break; case ATA_133a: p += sprintf(p, cycle_time[reg11 & 0x0F]); break;
case ATA_133: default: p += sprintf(p, "?"); break;
default: p += sprintf(p, "133+ ?"); break;
} }
p += sprintf(p, "\n"); p += sprintf(p, "\n");
} }
if (chipset_family < ATA_133) { /* else case TODO */
/* Data Active */ /* Data Active */
p += sprintf(p, " Data Active Time "); p += sprintf(p, " Data Active Time ");
switch(chipset_family) { switch(chipset_family) {
case ATA_00: case ATA_00:
case ATA_16: /* confirmed */ case ATA_16: /* confirmed */
case ATA_33: case ATA_33:
case ATA_66: case ATA_66:
case ATA_100a: p += sprintf(p, active_time[reg01 & 0x07]); break; case ATA_100a: p += sprintf(p, active_time[reg01 & 0x07]); break;
case ATA_100: case ATA_100:
case ATA_133a: p += sprintf(p, active_time[(reg00 & 0x70) >> 4]); break; case ATA_133a: p += sprintf(p, active_time[(reg00 & 0x70) >> 4]); break;
case ATA_133: default: p += sprintf(p, "?"); break;
default: p += sprintf(p, "133+ ?"); break; }
} p += sprintf(p, " \t Data Active Time ");
p += sprintf(p, " \t Data Active Time "); switch(chipset_family) {
switch(chipset_family) { case ATA_00:
case ATA_00: case ATA_16:
case ATA_16: case ATA_33:
case ATA_33: case ATA_66:
case ATA_66: case ATA_100a: p += sprintf(p, active_time[reg11 & 0x07]); break;
case ATA_100a: p += sprintf(p, active_time[reg11 & 0x07]); break; case ATA_100:
case ATA_100: case ATA_133a: p += sprintf(p, active_time[(reg10 & 0x70) >> 4]); break;
case ATA_133a: p += sprintf(p, active_time[(reg10 & 0x70) >> 4]); break; default: p += sprintf(p, "?"); break;
case ATA_133: }
default: p += sprintf(p, "133+ ?"); break; p += sprintf(p, "\n");
}
p += sprintf(p, "\n");
/* Data Recovery */ /* Data Recovery */
/* warning: may need (reg&0x07) for pre ATA66 chips */ /* warning: may need (reg&0x07) for pre ATA66 chips */
if (chipset_family < ATA_133) {
p += sprintf(p, " Data Recovery Time %s \t Data Recovery Time %s\n", p += sprintf(p, " Data Recovery Time %s \t Data Recovery Time %s\n",
recovery_time[reg00 & 0x0f], recovery_time[reg10 & 0x0f]); recovery_time[reg00 & 0x0f], recovery_time[reg10 & 0x0f]);
} }
...@@ -430,7 +427,6 @@ static int sis_get_info (char *buffer, char **addr, off_t offset, int count) ...@@ -430,7 +427,6 @@ static int sis_get_info (char *buffer, char **addr, off_t offset, int count)
p += sprintf(p, "\nSiS 5513 "); p += sprintf(p, "\nSiS 5513 ");
switch(chipset_family) { switch(chipset_family) {
case ATA_00: p += sprintf(p, "Unknown???"); break;
case ATA_16: p += sprintf(p, "DMA 16"); break; case ATA_16: p += sprintf(p, "DMA 16"); break;
case ATA_33: p += sprintf(p, "Ultra 33"); break; case ATA_33: p += sprintf(p, "Ultra 33"); break;
case ATA_66: p += sprintf(p, "Ultra 66"); break; case ATA_66: p += sprintf(p, "Ultra 66"); break;
...@@ -867,6 +863,19 @@ static int sis5513_config_xfer_rate (ide_drive_t *drive) ...@@ -867,6 +863,19 @@ static int sis5513_config_xfer_rate (ide_drive_t *drive)
return sis5513_config_drive_xfer_rate(drive); return sis5513_config_drive_xfer_rate(drive);
} }
/* Helper function used at init time
* returns a PCI device revision ID
* (used to detect different IDE controller versions)
*/
static u8 __init devfn_rev(int device, int function)
{
u8 revision;
/* Find device */
struct pci_dev* dev = pci_find_slot(0,PCI_DEVFN(device,function));
pci_read_config_byte(dev, PCI_REVISION_ID, &revision);
return revision;
}
/* Chip detection and general config */ /* Chip detection and general config */
static unsigned int __init init_chipset_sis5513 (struct pci_dev *dev, const char *name) static unsigned int __init init_chipset_sis5513 (struct pci_dev *dev, const char *name)
{ {
...@@ -887,26 +896,24 @@ static unsigned int __init init_chipset_sis5513 (struct pci_dev *dev, const char ...@@ -887,26 +896,24 @@ static unsigned int __init init_chipset_sis5513 (struct pci_dev *dev, const char
/* check 100/133 chipset family */ /* check 100/133 chipset family */
if (chipset_family == ATA_133) { if (chipset_family == ATA_133) {
u32 reg54h; u32 reg54h;
u16 reg02h; u16 devid;
pci_read_config_dword(dev, 0x54, &reg54h); pci_read_config_dword(dev, 0x54, &reg54h);
/* SiS962 and above report 0x5518 dev id if high bit is cleared */
pci_write_config_dword(dev, 0x54, (reg54h & 0x7fffffff)); pci_write_config_dword(dev, 0x54, (reg54h & 0x7fffffff));
pci_read_config_word(dev, 0x02, &reg02h); pci_read_config_word(dev, 0x02, &devid);
/* restore register 0x54 */
pci_write_config_dword(dev, 0x54, reg54h); pci_write_config_dword(dev, 0x54, reg54h);
/* devid 5518 here means SiS962 or later /* devid 5518 here means SiS962 or later
which supports ATA133 */ which supports ATA133.
if (reg02h != 0x5518) { These are refered by chipset_family = ATA133
*/
if (devid != 0x5518) {
u8 reg49h; u8 reg49h;
unsigned long sbrev;
/* SiS961 family */ /* SiS961 family */
/*
* FIXME !!! GAK!!!!!!!!!! PCI DIRECT POKING
*/
outl(0x80001008, 0x0cf8);
sbrev = inl(0x0cfc);
pci_read_config_byte(dev, 0x49, &reg49h); pci_read_config_byte(dev, 0x49, &reg49h);
if (((sbrev & 0xff) == 0x10) && (reg49h & 0x80)) /* check isa bridge device rev id */
if (((devfn_rev(2,0) & 0xff) == 0x10) && (reg49h & 0x80))
chipset_family = ATA_133a; chipset_family = ATA_133a;
else else
chipset_family = ATA_100; chipset_family = ATA_100;
...@@ -924,6 +931,14 @@ static unsigned int __init init_chipset_sis5513 (struct pci_dev *dev, const char ...@@ -924,6 +931,14 @@ static unsigned int __init init_chipset_sis5513 (struct pci_dev *dev, const char
u8 latency = (chipset_family == ATA_100)? 0x80 : 0x10; /* Lacking specs */ u8 latency = (chipset_family == ATA_100)? 0x80 : 0x10; /* Lacking specs */
pci_write_config_byte(dev, PCI_LATENCY_TIMER, latency); pci_write_config_byte(dev, PCI_LATENCY_TIMER, latency);
} }
/* Special case for SiS630 : 630S/ET is ATA_100a */
if (SiSHostChipInfo[i].host_id == PCI_DEVICE_ID_SI_630) {
/* check host device rev id */
if (devfn_rev(0,0) >= 0x30) {
chipset_family = ATA_100a;
}
}
} }
/* Make general config ops here /* Make general config ops here
......
/* /*
* *
* Version 3.36 * Version 3.37
* *
* VIA IDE driver for Linux. Supported southbridges: * VIA IDE driver for Linux. Supported southbridges:
* *
* vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b, * vt82c576, vt82c586, vt82c586a, vt82c586b, vt82c596a, vt82c596b,
* vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a, * vt82c686, vt82c686a, vt82c686b, vt8231, vt8233, vt8233c, vt8233a,
* vt8235 * vt8235, vt8237
* *
* Copyright (c) 2000-2002 Vojtech Pavlik * Copyright (c) 2000-2002 Vojtech Pavlik
* *
...@@ -74,9 +74,7 @@ static struct via_isa_bridge { ...@@ -74,9 +74,7 @@ static struct via_isa_bridge {
u8 rev_max; u8 rev_max;
u16 flags; u16 flags;
} via_isa_bridges[] = { } via_isa_bridges[] = {
#ifdef FUTURE_BRIDGES { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 },
#endif
{ "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, { "vt8233a", PCI_DEVICE_ID_VIA_8233A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
{ "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 }, { "vt8233c", PCI_DEVICE_ID_VIA_8233C_0, 0x00, 0x2f, VIA_UDMA_100 },
...@@ -148,7 +146,7 @@ static int via_get_info(char *buffer, char **addr, off_t offset, int count) ...@@ -148,7 +146,7 @@ static int via_get_info(char *buffer, char **addr, off_t offset, int count)
via_print("----------VIA BusMastering IDE Configuration" via_print("----------VIA BusMastering IDE Configuration"
"----------------"); "----------------");
via_print("Driver Version: 3.36"); via_print("Driver Version: 3.37");
via_print("South Bridge: VIA %s", via_print("South Bridge: VIA %s",
via_config->name); via_config->name);
......
...@@ -635,7 +635,22 @@ static void __init quirk_via_bridge(struct pci_dev *pdev) ...@@ -635,7 +635,22 @@ static void __init quirk_via_bridge(struct pci_dev *pdev)
if(pdev->devfn == 0) if(pdev->devfn == 0)
interrupt_line_quirk = 1; interrupt_line_quirk = 1;
} }
/*
* Serverworks CSB5 IDE does not fully support native mode
*/
static void __init quirk_svwks_csb5ide(struct pci_dev *pdev)
{
u8 prog;
pci_read_config_byte(pdev, PCI_CLASS_PROG, &prog);
if (prog & 5) {
prog &= ~5;
pdev->class &= ~5;
pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
/* need to re-assign BARs for compat mode */
quirk_ide_bases(pdev);
}
}
/* This was originally an Alpha specific thing, but it really fits here. /* This was originally an Alpha specific thing, but it really fits here.
* The i82375 PCI/EISA bridge appears as non-classified. Fix that. * The i82375 PCI/EISA bridge appears as non-classified. Fix that.
...@@ -812,7 +827,9 @@ static struct pci_fixup pci_fixups[] __devinitdata = { ...@@ -812,7 +827,9 @@ static struct pci_fixup pci_fixups[] __devinitdata = {
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge }, { PCI_FIXUP_HEADER, PCI_VENDOR_ID_TOSHIBA, 0x605, quirk_transparent_bridge },
{ PCI_FIXUP_FINAL, PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master }, { PCI_FIXUP_FINAL, PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide },
{ PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_eisa_bridge }, { PCI_FIXUP_HEADER, PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82375, quirk_eisa_bridge },
/* /*
......
...@@ -886,6 +886,8 @@ typedef struct hwif_s { ...@@ -886,6 +886,8 @@ typedef struct hwif_s {
struct pnp_dev *pnp_dev; /* for PnP devices */ struct pnp_dev *pnp_dev; /* for PnP devices */
ide_startstop_t (*rw_disk)(ide_drive_t *, struct request *, sector_t);
#if 0 #if 0
ide_hwif_ops_t *hwifops; ide_hwif_ops_t *hwifops;
#else #else
...@@ -1001,6 +1003,7 @@ typedef struct hwif_s { ...@@ -1001,6 +1003,7 @@ typedef struct hwif_s {
unsigned noprobe : 1; /* don't probe for this interface */ unsigned noprobe : 1; /* don't probe for this interface */
unsigned present : 1; /* this interface exists */ unsigned present : 1; /* this interface exists */
unsigned hold : 1; /* this interface is always present */
unsigned serialized : 1; /* serialized all channel operation */ unsigned serialized : 1; /* serialized all channel operation */
unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */ unsigned sharing_irq: 1; /* 1 = sharing irq with another hwif */
unsigned reset : 1; /* reset after probe */ unsigned reset : 1; /* reset after probe */
...@@ -1534,6 +1537,8 @@ extern u8 eighty_ninty_three (ide_drive_t *); ...@@ -1534,6 +1537,8 @@ extern u8 eighty_ninty_three (ide_drive_t *);
extern int set_transfer(ide_drive_t *, ide_task_t *); extern int set_transfer(ide_drive_t *, ide_task_t *);
extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *); extern int taskfile_lib_get_identify(ide_drive_t *drive, u8 *);
ide_startstop_t __ide_do_rw_disk(ide_drive_t *drive, struct request *rq, sector_t block);
/* /*
* ide_system_bus_speed() returns what we think is the system VESA/PCI * ide_system_bus_speed() returns what we think is the system VESA/PCI
* bus speed (in MHz). This is used for calculating interface PIO timings. * bus speed (in MHz). This is used for calculating interface PIO timings.
......
...@@ -557,6 +557,7 @@ ...@@ -557,6 +557,7 @@
#define PCI_DEVICE_ID_SI_650 0x0650 #define PCI_DEVICE_ID_SI_650 0x0650
#define PCI_DEVICE_ID_SI_651 0x0651 #define PCI_DEVICE_ID_SI_651 0x0651
#define PCI_DEVICE_ID_SI_652 0x0652 #define PCI_DEVICE_ID_SI_652 0x0652
#define PCI_DEVICE_ID_SI_655 0x0655
#define PCI_DEVICE_ID_SI_730 0x0730 #define PCI_DEVICE_ID_SI_730 0x0730
#define PCI_DEVICE_ID_SI_630_VGA 0x6300 #define PCI_DEVICE_ID_SI_630_VGA 0x6300
#define PCI_DEVICE_ID_SI_730_VGA 0x7300 #define PCI_DEVICE_ID_SI_730_VGA 0x7300
...@@ -1127,6 +1128,7 @@ ...@@ -1127,6 +1128,7 @@
#define PCI_DEVICE_ID_VIA_8753_0 0x3128 #define PCI_DEVICE_ID_VIA_8753_0 0x3128
#define PCI_DEVICE_ID_VIA_8233A 0x3147 #define PCI_DEVICE_ID_VIA_8233A 0x3147
#define PCI_DEVICE_ID_VIA_8752 0x3148 #define PCI_DEVICE_ID_VIA_8752 0x3148
#define PCI_DEVICE_ID_VIA_8237_SATA 0x3149
#define PCI_DEVICE_ID_VIA_KN266 0x3156 #define PCI_DEVICE_ID_VIA_KN266 0x3156
#define PCI_DEVICE_ID_VIA_8754 0x3168 #define PCI_DEVICE_ID_VIA_8754 0x3168
#define PCI_DEVICE_ID_VIA_8235 0x3177 #define PCI_DEVICE_ID_VIA_8235 0x3177
...@@ -1135,6 +1137,7 @@ ...@@ -1135,6 +1137,7 @@
#define PCI_DEVICE_ID_VIA_8377_0 0x3189 #define PCI_DEVICE_ID_VIA_8377_0 0x3189
#define PCI_DEVICE_ID_VIA_KM400 0x3205 #define PCI_DEVICE_ID_VIA_KM400 0x3205
#define PCI_DEVICE_ID_VIA_P4M400 0x3209 #define PCI_DEVICE_ID_VIA_P4M400 0x3209
#define PCI_DEVICE_ID_VIA_8237 0x3227
#define PCI_DEVICE_ID_VIA_86C100A 0x6100 #define PCI_DEVICE_ID_VIA_86C100A 0x6100
#define PCI_DEVICE_ID_VIA_8231 0x8231 #define PCI_DEVICE_ID_VIA_8231 0x8231
#define PCI_DEVICE_ID_VIA_8231_4 0x8235 #define PCI_DEVICE_ID_VIA_8231_4 0x8235
...@@ -1893,6 +1896,7 @@ ...@@ -1893,6 +1896,7 @@
#define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc #define PCI_DEVICE_ID_INTEL_82801DB_12 0x24cc
#define PCI_DEVICE_ID_INTEL_82801DB_13 0x24cd #define PCI_DEVICE_ID_INTEL_82801DB_13 0x24cd
#define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0 #define PCI_DEVICE_ID_INTEL_82801EB_0 0x24d0
#define PCI_DEVICE_ID_INTEL_82801EB_1 0x24d1
#define PCI_DEVICE_ID_INTEL_82801EB_2 0x24d2 #define PCI_DEVICE_ID_INTEL_82801EB_2 0x24d2
#define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3 #define PCI_DEVICE_ID_INTEL_82801EB_3 0x24d3
#define PCI_DEVICE_ID_INTEL_82801EB_4 0x24d4 #define PCI_DEVICE_ID_INTEL_82801EB_4 0x24d4
......
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