Commit e529c7e6 authored by Rob Clark's avatar Rob Clark

drm/msm: add support for msm8060ab/bstem

This adds the necessary configuration for the APQ8060A SoC (dual-core
krait + a320 gpu) as found on the bstem board.
Signed-off-by: default avatarRob Clark <robdclark@gmail.com>
parent 871d812a
...@@ -219,7 +219,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu) ...@@ -219,7 +219,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
/* Load PM4: */ /* Load PM4: */
ptr = (uint32_t *)(adreno_gpu->pm4->data); ptr = (uint32_t *)(adreno_gpu->pm4->data);
len = adreno_gpu->pm4->size / 4; len = adreno_gpu->pm4->size / 4;
DBG("loading PM4 ucode version: %u", ptr[0]); DBG("loading PM4 ucode version: %x", ptr[1]);
gpu_write(gpu, REG_AXXX_CP_DEBUG, gpu_write(gpu, REG_AXXX_CP_DEBUG,
AXXX_CP_DEBUG_DYNAMIC_CLK_DISABLE | AXXX_CP_DEBUG_DYNAMIC_CLK_DISABLE |
...@@ -231,7 +231,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu) ...@@ -231,7 +231,7 @@ static int a3xx_hw_init(struct msm_gpu *gpu)
/* Load PFP: */ /* Load PFP: */
ptr = (uint32_t *)(adreno_gpu->pfp->data); ptr = (uint32_t *)(adreno_gpu->pfp->data);
len = adreno_gpu->pfp->size / 4; len = adreno_gpu->pfp->size / 4;
DBG("loading PFP ucode version: %u", ptr[0]); DBG("loading PFP ucode version: %x", ptr[5]);
gpu_write(gpu, REG_A3XX_CP_PFP_UCODE_ADDR, 0); gpu_write(gpu, REG_A3XX_CP_PFP_UCODE_ADDR, 0);
for (i = 1; i < len; i++) for (i = 1; i < len; i++)
...@@ -469,7 +469,7 @@ static int a3xx_probe(struct platform_device *pdev) ...@@ -469,7 +469,7 @@ static int a3xx_probe(struct platform_device *pdev)
config.slow_rate = 27000000; config.slow_rate = 27000000;
config.bus_freq = 4; config.bus_freq = 4;
config.rev = ADRENO_REV(3, 2, 1, 0); config.rev = ADRENO_REV(3, 2, 1, 0);
} else if (cpu_is_apq8064() || cpu_is_msm8960ab()) { } else if (cpu_is_apq8064()) {
config.fast_rate = 400000000; config.fast_rate = 400000000;
config.slow_rate = 27000000; config.slow_rate = 27000000;
config.bus_freq = 4; config.bus_freq = 4;
...@@ -482,6 +482,16 @@ static int a3xx_probe(struct platform_device *pdev) ...@@ -482,6 +482,16 @@ static int a3xx_probe(struct platform_device *pdev)
else else
config.rev = ADRENO_REV(3, 2, 0, 0); config.rev = ADRENO_REV(3, 2, 0, 0);
} else if (cpu_is_msm8960ab()) {
config.fast_rate = 400000000;
config.slow_rate = 320000000;
config.bus_freq = 4;
if (SOCINFO_VERSION_MINOR(version) == 0)
config.rev = ADRENO_REV(3, 2, 1, 0);
else
config.rev = ADRENO_REV(3, 2, 1, 1);
} else if (cpu_is_msm8930()) { } else if (cpu_is_msm8930()) {
config.fast_rate = 400000000; config.fast_rate = 400000000;
config.slow_rate = 27000000; config.slow_rate = 27000000;
......
...@@ -122,7 +122,7 @@ int hdmi_init(struct drm_device *dev, struct drm_encoder *encoder) ...@@ -122,7 +122,7 @@ int hdmi_init(struct drm_device *dev, struct drm_encoder *encoder)
hdmi->mvs = devm_regulator_get(&pdev->dev, "8901_hdmi_mvs"); hdmi->mvs = devm_regulator_get(&pdev->dev, "8901_hdmi_mvs");
if (IS_ERR(hdmi->mvs)) if (IS_ERR(hdmi->mvs))
hdmi->mvs = devm_regulator_get(&pdev->dev, "hdmi_mvs"); hdmi->mvs = devm_regulator_get(&pdev->dev, "8921_hdmi_mvs");
if (IS_ERR(hdmi->mvs)) { if (IS_ERR(hdmi->mvs)) {
ret = PTR_ERR(hdmi->mvs); ret = PTR_ERR(hdmi->mvs);
dev_err(dev->dev, "failed to get mvs regulator: %d\n", ret); dev_err(dev->dev, "failed to get mvs regulator: %d\n", ret);
...@@ -230,7 +230,7 @@ static int hdmi_dev_probe(struct platform_device *pdev) ...@@ -230,7 +230,7 @@ static int hdmi_dev_probe(struct platform_device *pdev)
config.ddc_data_gpio = 71; config.ddc_data_gpio = 71;
config.hpd_gpio = 72; config.hpd_gpio = 72;
config.pmic_gpio = 13 + NR_GPIO_IRQS; config.pmic_gpio = 13 + NR_GPIO_IRQS;
} else if (cpu_is_msm8960()) { } else if (cpu_is_msm8960() || cpu_is_msm8960ab()) {
config.phy_init = hdmi_phy_8960_init; config.phy_init = hdmi_phy_8960_init;
config.ddc_clk_gpio = 100; config.ddc_clk_gpio = 100;
config.ddc_data_gpio = 101; config.ddc_data_gpio = 101;
......
...@@ -32,7 +32,9 @@ static int mdp4_hw_init(struct msm_kms *kms) ...@@ -32,7 +32,9 @@ static int mdp4_hw_init(struct msm_kms *kms)
pm_runtime_get_sync(dev->dev); pm_runtime_get_sync(dev->dev);
mdp4_enable(mdp4_kms);
version = mdp4_read(mdp4_kms, REG_MDP4_VERSION); version = mdp4_read(mdp4_kms, REG_MDP4_VERSION);
mdp4_disable(mdp4_kms);
major = FIELD(version, MDP4_VERSION_MAJOR); major = FIELD(version, MDP4_VERSION_MAJOR);
minor = FIELD(version, MDP4_VERSION_MINOR); minor = FIELD(version, MDP4_VERSION_MINOR);
...@@ -328,9 +330,11 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev) ...@@ -328,9 +330,11 @@ struct msm_kms *mdp4_kms_init(struct drm_device *dev)
* have left things on, in which case we'll start getting faults if * have left things on, in which case we'll start getting faults if
* we don't disable): * we don't disable):
*/ */
mdp4_enable(mdp4_kms);
mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0); mdp4_write(mdp4_kms, REG_MDP4_DTV_ENABLE, 0);
mdp4_write(mdp4_kms, REG_MDP4_LCDC_ENABLE, 0); mdp4_write(mdp4_kms, REG_MDP4_LCDC_ENABLE, 0);
mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0); mdp4_write(mdp4_kms, REG_MDP4_DSI_ENABLE, 0);
mdp4_disable(mdp4_kms);
mdelay(16); mdelay(16);
if (config->iommu) { if (config->iommu) {
......
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