Commit e56b80d9 authored by Ville Syrjälä's avatar Ville Syrjälä

drm/i915: Fix up the sprite namespacing

Give all sprite exclusive functions/etc. a proper namespace.

Cc: Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>
Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211018115030.3547-4-ville.syrjala@linux.intel.comReviewed-by: default avatarStanislav Lisovskiy <stanislav.lisovskiy@intel.com>
parent 50faf7a1
...@@ -119,7 +119,7 @@ static void i9xx_plane_linear_gamma(u16 gamma[8]) ...@@ -119,7 +119,7 @@ static void i9xx_plane_linear_gamma(u16 gamma[8])
} }
static void static void
chv_update_csc(const struct intel_plane_state *plane_state) chv_sprite_update_csc(const struct intel_plane_state *plane_state)
{ {
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -191,7 +191,7 @@ chv_update_csc(const struct intel_plane_state *plane_state) ...@@ -191,7 +191,7 @@ chv_update_csc(const struct intel_plane_state *plane_state)
#define COS_0 1 #define COS_0 1
static void static void
vlv_update_clrc(const struct intel_plane_state *plane_state) vlv_sprite_update_clrc(const struct intel_plane_state *plane_state)
{ {
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -394,7 +394,7 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state, ...@@ -394,7 +394,7 @@ static u32 vlv_sprite_ctl(const struct intel_crtc_state *crtc_state,
return sprctl; return sprctl;
} }
static void vlv_update_gamma(const struct intel_plane_state *plane_state) static void vlv_sprite_update_gamma(const struct intel_plane_state *plane_state)
{ {
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -418,7 +418,7 @@ static void vlv_update_gamma(const struct intel_plane_state *plane_state) ...@@ -418,7 +418,7 @@ static void vlv_update_gamma(const struct intel_plane_state *plane_state)
} }
static void static void
vlv_update_plane(struct intel_plane *plane, vlv_sprite_update(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state, const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state) const struct intel_plane_state *plane_state)
{ {
...@@ -456,7 +456,7 @@ vlv_update_plane(struct intel_plane *plane, ...@@ -456,7 +456,7 @@ vlv_update_plane(struct intel_plane *plane,
intel_de_write_fw(dev_priv, SPCONSTALPHA(pipe, plane_id), 0); intel_de_write_fw(dev_priv, SPCONSTALPHA(pipe, plane_id), 0);
if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B)
chv_update_csc(plane_state); chv_sprite_update_csc(plane_state);
if (key->flags) { if (key->flags) {
intel_de_write_fw(dev_priv, SPKEYMINVAL(pipe, plane_id), intel_de_write_fw(dev_priv, SPKEYMINVAL(pipe, plane_id),
...@@ -479,14 +479,14 @@ vlv_update_plane(struct intel_plane *plane, ...@@ -479,14 +479,14 @@ vlv_update_plane(struct intel_plane *plane,
intel_de_write_fw(dev_priv, SPSURF(pipe, plane_id), intel_de_write_fw(dev_priv, SPSURF(pipe, plane_id),
intel_plane_ggtt_offset(plane_state) + sprsurf_offset); intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
vlv_update_clrc(plane_state); vlv_sprite_update_clrc(plane_state);
vlv_update_gamma(plane_state); vlv_sprite_update_gamma(plane_state);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
} }
static void static void
vlv_disable_plane(struct intel_plane *plane, vlv_sprite_disable(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state) const struct intel_crtc_state *crtc_state)
{ {
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -503,7 +503,7 @@ vlv_disable_plane(struct intel_plane *plane, ...@@ -503,7 +503,7 @@ vlv_disable_plane(struct intel_plane *plane,
} }
static bool static bool
vlv_plane_get_hw_state(struct intel_plane *plane, vlv_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe) enum pipe *pipe)
{ {
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -806,7 +806,7 @@ static void ivb_sprite_linear_gamma(const struct intel_plane_state *plane_state, ...@@ -806,7 +806,7 @@ static void ivb_sprite_linear_gamma(const struct intel_plane_state *plane_state,
i++; i++;
} }
static void ivb_update_gamma(const struct intel_plane_state *plane_state) static void ivb_sprite_update_gamma(const struct intel_plane_state *plane_state)
{ {
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -836,7 +836,7 @@ static void ivb_update_gamma(const struct intel_plane_state *plane_state) ...@@ -836,7 +836,7 @@ static void ivb_update_gamma(const struct intel_plane_state *plane_state)
} }
static void static void
ivb_update_plane(struct intel_plane *plane, ivb_sprite_update(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state, const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state) const struct intel_plane_state *plane_state)
{ {
...@@ -903,13 +903,13 @@ ivb_update_plane(struct intel_plane *plane, ...@@ -903,13 +903,13 @@ ivb_update_plane(struct intel_plane *plane,
intel_de_write_fw(dev_priv, SPRSURF(pipe), intel_de_write_fw(dev_priv, SPRSURF(pipe),
intel_plane_ggtt_offset(plane_state) + sprsurf_offset); intel_plane_ggtt_offset(plane_state) + sprsurf_offset);
ivb_update_gamma(plane_state); ivb_sprite_update_gamma(plane_state);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
} }
static void static void
ivb_disable_plane(struct intel_plane *plane, ivb_sprite_disable(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state) const struct intel_crtc_state *crtc_state)
{ {
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -928,7 +928,7 @@ ivb_disable_plane(struct intel_plane *plane, ...@@ -928,7 +928,7 @@ ivb_disable_plane(struct intel_plane *plane,
} }
static bool static bool
ivb_plane_get_hw_state(struct intel_plane *plane, ivb_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe) enum pipe *pipe)
{ {
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -1107,7 +1107,7 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state, ...@@ -1107,7 +1107,7 @@ static u32 g4x_sprite_ctl(const struct intel_crtc_state *crtc_state,
return dvscntr; return dvscntr;
} }
static void g4x_update_gamma(const struct intel_plane_state *plane_state) static void g4x_sprite_update_gamma(const struct intel_plane_state *plane_state)
{ {
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -1137,7 +1137,7 @@ static void ilk_sprite_linear_gamma(u16 gamma[17]) ...@@ -1137,7 +1137,7 @@ static void ilk_sprite_linear_gamma(u16 gamma[17])
gamma[i] = (i << 10) / 16; gamma[i] = (i << 10) / 16;
} }
static void ilk_update_gamma(const struct intel_plane_state *plane_state) static void ilk_sprite_update_gamma(const struct intel_plane_state *plane_state)
{ {
struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane); struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -1164,7 +1164,7 @@ static void ilk_update_gamma(const struct intel_plane_state *plane_state) ...@@ -1164,7 +1164,7 @@ static void ilk_update_gamma(const struct intel_plane_state *plane_state)
} }
static void static void
g4x_update_plane(struct intel_plane *plane, g4x_sprite_update(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state, const struct intel_crtc_state *crtc_state,
const struct intel_plane_state *plane_state) const struct intel_plane_state *plane_state)
{ {
...@@ -1225,15 +1225,15 @@ g4x_update_plane(struct intel_plane *plane, ...@@ -1225,15 +1225,15 @@ g4x_update_plane(struct intel_plane *plane,
intel_plane_ggtt_offset(plane_state) + dvssurf_offset); intel_plane_ggtt_offset(plane_state) + dvssurf_offset);
if (IS_G4X(dev_priv)) if (IS_G4X(dev_priv))
g4x_update_gamma(plane_state); g4x_sprite_update_gamma(plane_state);
else else
ilk_update_gamma(plane_state); ilk_sprite_update_gamma(plane_state);
spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags); spin_unlock_irqrestore(&dev_priv->uncore.lock, irqflags);
} }
static void static void
g4x_disable_plane(struct intel_plane *plane, g4x_sprite_disable(struct intel_plane *plane,
const struct intel_crtc_state *crtc_state) const struct intel_crtc_state *crtc_state)
{ {
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -1251,7 +1251,7 @@ g4x_disable_plane(struct intel_plane *plane, ...@@ -1251,7 +1251,7 @@ g4x_disable_plane(struct intel_plane *plane,
} }
static bool static bool
g4x_plane_get_hw_state(struct intel_plane *plane, g4x_sprite_get_hw_state(struct intel_plane *plane,
enum pipe *pipe) enum pipe *pipe)
{ {
struct drm_i915_private *dev_priv = to_i915(plane->base.dev); struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
...@@ -1568,7 +1568,7 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data, ...@@ -1568,7 +1568,7 @@ int intel_sprite_set_colorkey_ioctl(struct drm_device *dev, void *data,
return ret; return ret;
} }
static const u32 g4x_plane_formats[] = { static const u32 g4x_sprite_formats[] = {
DRM_FORMAT_XRGB8888, DRM_FORMAT_XRGB8888,
DRM_FORMAT_YUYV, DRM_FORMAT_YUYV,
DRM_FORMAT_YVYU, DRM_FORMAT_YVYU,
...@@ -1576,7 +1576,7 @@ static const u32 g4x_plane_formats[] = { ...@@ -1576,7 +1576,7 @@ static const u32 g4x_plane_formats[] = {
DRM_FORMAT_VYUY, DRM_FORMAT_VYUY,
}; };
static const u32 snb_plane_formats[] = { static const u32 snb_sprite_formats[] = {
DRM_FORMAT_XRGB8888, DRM_FORMAT_XRGB8888,
DRM_FORMAT_XBGR8888, DRM_FORMAT_XBGR8888,
DRM_FORMAT_XRGB2101010, DRM_FORMAT_XRGB2101010,
...@@ -1589,7 +1589,7 @@ static const u32 snb_plane_formats[] = { ...@@ -1589,7 +1589,7 @@ static const u32 snb_plane_formats[] = {
DRM_FORMAT_VYUY, DRM_FORMAT_VYUY,
}; };
static const u32 vlv_plane_formats[] = { static const u32 vlv_sprite_formats[] = {
DRM_FORMAT_C8, DRM_FORMAT_C8,
DRM_FORMAT_RGB565, DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888, DRM_FORMAT_XRGB8888,
...@@ -1742,9 +1742,9 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, ...@@ -1742,9 +1742,9 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
return plane; return plane;
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) { if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
plane->update_plane = vlv_update_plane; plane->update_plane = vlv_sprite_update;
plane->disable_plane = vlv_disable_plane; plane->disable_plane = vlv_sprite_disable;
plane->get_hw_state = vlv_plane_get_hw_state; plane->get_hw_state = vlv_sprite_get_hw_state;
plane->check_plane = vlv_sprite_check; plane->check_plane = vlv_sprite_check;
plane->max_stride = i965_plane_max_stride; plane->max_stride = i965_plane_max_stride;
plane->min_cdclk = vlv_plane_min_cdclk; plane->min_cdclk = vlv_plane_min_cdclk;
...@@ -1753,15 +1753,15 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, ...@@ -1753,15 +1753,15 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
formats = chv_pipe_b_sprite_formats; formats = chv_pipe_b_sprite_formats;
num_formats = ARRAY_SIZE(chv_pipe_b_sprite_formats); num_formats = ARRAY_SIZE(chv_pipe_b_sprite_formats);
} else { } else {
formats = vlv_plane_formats; formats = vlv_sprite_formats;
num_formats = ARRAY_SIZE(vlv_plane_formats); num_formats = ARRAY_SIZE(vlv_sprite_formats);
} }
plane_funcs = &vlv_sprite_funcs; plane_funcs = &vlv_sprite_funcs;
} else if (DISPLAY_VER(dev_priv) >= 7) { } else if (DISPLAY_VER(dev_priv) >= 7) {
plane->update_plane = ivb_update_plane; plane->update_plane = ivb_sprite_update;
plane->disable_plane = ivb_disable_plane; plane->disable_plane = ivb_sprite_disable;
plane->get_hw_state = ivb_plane_get_hw_state; plane->get_hw_state = ivb_sprite_get_hw_state;
plane->check_plane = g4x_sprite_check; plane->check_plane = g4x_sprite_check;
if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) { if (IS_BROADWELL(dev_priv) || IS_HASWELL(dev_priv)) {
...@@ -1772,26 +1772,26 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, ...@@ -1772,26 +1772,26 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
plane->min_cdclk = ivb_sprite_min_cdclk; plane->min_cdclk = ivb_sprite_min_cdclk;
} }
formats = snb_plane_formats; formats = snb_sprite_formats;
num_formats = ARRAY_SIZE(snb_plane_formats); num_formats = ARRAY_SIZE(snb_sprite_formats);
plane_funcs = &snb_sprite_funcs; plane_funcs = &snb_sprite_funcs;
} else { } else {
plane->update_plane = g4x_update_plane; plane->update_plane = g4x_sprite_update;
plane->disable_plane = g4x_disable_plane; plane->disable_plane = g4x_sprite_disable;
plane->get_hw_state = g4x_plane_get_hw_state; plane->get_hw_state = g4x_sprite_get_hw_state;
plane->check_plane = g4x_sprite_check; plane->check_plane = g4x_sprite_check;
plane->max_stride = g4x_sprite_max_stride; plane->max_stride = g4x_sprite_max_stride;
plane->min_cdclk = g4x_sprite_min_cdclk; plane->min_cdclk = g4x_sprite_min_cdclk;
if (IS_SANDYBRIDGE(dev_priv)) { if (IS_SANDYBRIDGE(dev_priv)) {
formats = snb_plane_formats; formats = snb_sprite_formats;
num_formats = ARRAY_SIZE(snb_plane_formats); num_formats = ARRAY_SIZE(snb_sprite_formats);
plane_funcs = &snb_sprite_funcs; plane_funcs = &snb_sprite_funcs;
} else { } else {
formats = g4x_plane_formats; formats = g4x_sprite_formats;
num_formats = ARRAY_SIZE(g4x_plane_formats); num_formats = ARRAY_SIZE(g4x_sprite_formats);
plane_funcs = &g4x_sprite_funcs; plane_funcs = &g4x_sprite_funcs;
} }
......
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