[ALPHA] Formatting cleanup, warning removal, move declarations

to header files where they belong.

arch/alpha/kernel/core_marvel.c

 /*
  *	linux/arch/alpha/kernel/core_marvel.c
  *
- * Code common to all Marvel based systems
+ * Code common to all Marvel based systems.
  */
 
 #include <linux/config.h>
@@ -55,7 +55,7 @@ static struct io7 *io7_head = NULL;
 /*
  * Helper functions
  */
-static unsigned long 
+static unsigned long __attribute__ ((unused))
 read_ev7_csr(int pe, unsigned long offset)
 {
 	ev7_csr *ev7csr = EV7_CSR_KERN(pe, offset);
@@ -91,18 +91,19 @@ mk_resource_name(int pe, int port, char *str)
 	return name;
 }
 
-struct io7 *marvel_next_io7(struct io7 *prev)
+inline struct io7 *
+marvel_next_io7(struct io7 *prev)
 {
-	if (!prev) return io7_head;
-	return prev->next;
+	return (prev ? prev->next : io7_head);
 }
 
-struct io7 *marvel_find_io7(int pe)
+struct io7 *
+marvel_find_io7(int pe)
 {
 	struct io7 *io7;
 
-	io7 = marvel_next_io7(NULL);
-	for(; io7 && io7->pe != pe; io7 = marvel_next_io7(io7));
+	for (io7 = io7_head; io7 && io7->pe != pe; io7 = io7->next)
+		continue;
 
 	return io7;
 }
@@ -123,14 +124,14 @@ alloc_io7(unsigned int pe)
 	io7->pe = pe;
 	io7->irq_lock = SPIN_LOCK_UNLOCKED;
 
-	for(h = 0; h < 4; h++) {
+	for (h = 0; h < 4; h++) {
 		io7->ports[h].io7 = io7;
 		io7->ports[h].port = h;
 		io7->ports[h].enabled = 0; /* default to disabled */
 	}
 
 	/*
-	 * insert in pe sorted order
+	 * Insert in pe sorted order.
 	 */
 	if (NULL == io7_head)			/* empty list */
 		io7_head = io7;	
@@ -138,7 +139,7 @@ alloc_io7(unsigned int pe)
 		io7->next = io7_head;
 		io7_head = io7;
 	} else {				/* insert at position */
-		for(insp = io7_head; insp; insp = insp->next) {
+		for (insp = io7_head; insp; insp = insp->next) {
 			if (insp->pe == io7->pe) {
 				printk(KERN_ERR "Too many IO7s at PE %d\n", 
 				       io7->pe);
@@ -173,30 +174,30 @@ io7_clear_errors(struct io7 *io7)
 
 
 	/*
-	 * First the IO ports
+	 * First the IO ports.
 	 */
-	for(port = 0; port < 4; port++) {
+	for (port = 0; port < 4; port++) {
 		csrs = IO7_CSRS_KERN(io7->pe, port);
 
-		csrs->POx_ERR_SUM.csr = (unsigned long)-1L;
-		csrs->POx_TLB_ERR.csr = (unsigned long)-1L;
-		csrs->POx_SPL_COMPLT.csr = (unsigned long)-1L;
-		csrs->POx_TRANS_SUM.csr = (unsigned long)-1L;
+		csrs->POx_ERR_SUM.csr = -1UL;
+		csrs->POx_TLB_ERR.csr = -1UL;
+		csrs->POx_SPL_COMPLT.csr = -1UL;
+		csrs->POx_TRANS_SUM.csr = -1UL;
 	}
 
 	/*
-	 * Then the common ones
+	 * Then the common ones.
 	 */
 	p7csrs = IO7_PORT7_CSRS_KERN(io7->pe);
 
-	p7csrs->PO7_ERROR_SUM.csr = (unsigned long)-1L;
-	p7csrs->PO7_UNCRR_SYM.csr = (unsigned long)-1L;
-	p7csrs->PO7_CRRCT_SYM.csr = (unsigned long)-1L;
+	p7csrs->PO7_ERROR_SUM.csr = -1UL;
+	p7csrs->PO7_UNCRR_SYM.csr = -1UL;
+	p7csrs->PO7_CRRCT_SYM.csr = -1UL;
 }
 
 
 /*
- * IO7 PCI, PCI/X, AGP configuration
+ * IO7 PCI, PCI/X, AGP configuration.
  */
 static void __init
 io7_init_hose(struct io7 *io7, int port)
@@ -237,7 +238,7 @@ io7_init_hose(struct io7 *io7, int port)
 	hose->dense_io_base = IO7_IO_PHYS(io7->pe, port);
 
 	/*
-	 * Base addresses and resource ranges for kernel consumption
+	 * Base addresses and resource ranges for kernel consumption.
 	 */
 	hose->config_space_base = (unsigned long)IO7_CONF_KERN(io7->pe, port);
 
@@ -259,9 +260,9 @@ io7_init_hose(struct io7 *io7, int port)
 		       hose->index);
 
 	/*
-	 * Save the existing DMA window settings for later restoration
+	 * Save the existing DMA window settings for later restoration.
 	 */
-	for(i = 0; i < 4; i++) {
+	for (i = 0; i < 4; i++) {
 		io7_port->saved_wbase[i] = csrs->POx_WBASE[i].csr;
 		io7_port->saved_wmask[i] = csrs->POx_WMASK[i].csr;
 		io7_port->saved_tbase[i] = csrs->POx_TBASE[i].csr;
@@ -277,12 +278,12 @@ io7_init_hose(struct io7 *io7, int port)
 	 */
 
 	/*
-	 * tbia before modifying windows
+	 * TBIA before modifying windows.
 	 */
 	marvel_pci_tbi(hose, 0, -1);
 
 	/*
-	 * set up window 0 for scatter-gather 8MB at 8MB
+	 * Set up window 0 for scatter-gather 8MB at 8MB.
 	 */
 	hose->sg_isa = iommu_arena_new_node(marvel_cpuid_to_nid(io7->pe),
 					    hose, 0x00800000, 0x00800000, 0);
@@ -293,14 +294,14 @@ io7_init_hose(struct io7 *io7, int port)
 	csrs->POx_TBASE[0].csr = virt_to_phys(hose->sg_isa->ptes);
 
 	/*
-	 * set up window 1 for direct-mapped 1GB at 2GB
+	 * Set up window 1 for direct-mapped 1GB at 2GB.
 	 */
 	csrs->POx_WBASE[1].csr = __direct_map_base | wbase_m_ena;
 	csrs->POx_WMASK[1].csr = (__direct_map_size - 1) & wbase_m_addr;
 	csrs->POx_TBASE[1].csr = 0;
 
 	/*
-	 * set up window 2 for scatter-gather (up-to) 1GB at 3GB
+	 * Set up window 2 for scatter-gather (up-to) 1GB at 3GB.
 	 */
 	hose->sg_pci = iommu_arena_new_node(marvel_cpuid_to_nid(io7->pe),
 					    hose, 0xc0000000, 0x40000000, 0);
@@ -311,12 +312,12 @@ io7_init_hose(struct io7 *io7, int port)
 	csrs->POx_TBASE[2].csr = virt_to_phys(hose->sg_pci->ptes);
 
 	/*
-	 * disable window 3
+	 * Disable window 3.
 	 */
 	csrs->POx_WBASE[3].csr = 0;
 
 	/*
-	 * Make sure that the AGP Monster Window is disabled
+	 * Make sure that the AGP Monster Window is disabled.
 	 */
 	csrs->POx_CTRL.csr &= ~(1UL << 61);
 
@@ -325,7 +326,7 @@ io7_init_hose(struct io7 *io7, int port)
 	csrs->POx_MSK_HEI.csr &= ~(3UL << 14);
 #endif
 	/*
-	 * tbia after modifying windows
+	 * TBIA after modifying windows.
 	 */
 	marvel_pci_tbi(hose, 0, -1);
 }
@@ -338,14 +339,14 @@ marvel_init_io7(struct io7 *io7)
 	printk("Initializing IO7 at PID %d\n", io7->pe);
 
 	/*
-	 * Get the Port 7 CSR pointer
+	 * Get the Port 7 CSR pointer.
 	 */
 	io7->csrs = IO7_PORT7_CSRS_KERN(io7->pe);
 
 	/*
-	 * Init this IO7's hoses
+	 * Init this IO7's hoses.
 	 */
-	for(i = 0; i < IO7_NUM_PORTS; i++) {
+	for (i = 0; i < IO7_NUM_PORTS; i++) {
 		io7_ioport_csrs *csrs = IO7_CSRS_KERN(io7->pe, i);
 		if (csrs->POx_CACHE_CTL.csr == 8) {
 			io7->ports[i].enabled = 1;
@@ -354,7 +355,8 @@ marvel_init_io7(struct io7 *io7)
 	}
 }
 
-void marvel_io7_present(gct6_node *node)
+void
+marvel_io7_present(gct6_node *node)
 {
 	int pe;
 
@@ -418,7 +420,8 @@ gct6_search_struct gct_wanted_node_list[] = {
  * at boot time. Syntax is 'io7=a,b,c,...,n' where a-n are the PIDs (decimal)
  * where IO7s are connected
  */
-static int __init marvel_specify_io7(char *str)
+static int __init
+marvel_specify_io7(char *str)
 {
 	unsigned long pid;
 	struct io7 *io7;
@@ -449,18 +452,18 @@ marvel_init_arch(void)
 	ioport_resource.end = ~0UL;
 	iomem_resource.end = ~0UL;
 
-	/* PCI DMA Direct Mapping is 1GB at 2GB */
+	/* PCI DMA Direct Mapping is 1GB at 2GB.  */
 	__direct_map_base = 0x80000000;
 	__direct_map_size = 0x40000000;
 
-	/* parse the config tree */
+	/* Parse the config tree.  */
 	gct6_find_nodes(GCT_NODE_PTR(0), gct_wanted_node_list);
 
-	/* init the io7s */
-	for(io7 = NULL; NULL != (io7 = marvel_next_io7(io7)); ) 
+	/* Init the io7s.  */
+	for (io7 = NULL; NULL != (io7 = marvel_next_io7(io7)); ) 
 		marvel_init_io7(io7);
 
-	/* Check for graphic console location (if any) */
+	/* Check for graphic console location (if any).  */
 	marvel_init_vga_hose();
 }
 
@@ -499,7 +502,7 @@ marvel_kill_arch(int mode)
 
 static inline unsigned long
 build_conf_addr(struct pci_controller *hose, u8 bus, 
-                unsigned int devfn, int where)
+		unsigned int devfn, int where)
 {
 	return (hose->config_space_base | (bus << 16) | (devfn << 8) | where);
 }
@@ -515,14 +518,15 @@ mk_conf_addr(struct pci_bus *pbus, unsigned int devfn, int where)
 	if (!hose)
 		return addr;
 
-	/* check for enabled... */
+	/* Check for enabled.  */
 	io7_port = hose->sysdata;
 	if (!io7_port->enabled)
 		return addr;
 
 	if (hose->first_busno == bus) {
-		/* don't support idsel > 20 on primary bus */
-		if (devfn >= PCI_DEVFN(21, 0)) return addr;
+		/* Don't support idsel > 20 on primary bus.  */
+		if (devfn >= PCI_DEVFN(21, 0))
+			return addr;
 		bus = 0;
 	}
 
@@ -598,7 +602,7 @@ struct pci_ops marvel_pci_ops =
 
 
 /*
- * Other PCI helper functions
+ * Other PCI helper functions.
  */
 void
 marvel_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)
@@ -613,12 +617,11 @@ marvel_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)
 
 
 /*
- * IO map support
+ * IO map support.
  */
 unsigned long
 marvel_ioremap(unsigned long addr, unsigned long size)
 {
-	extern struct pci_controller *hose_head;
 	struct pci_controller *hose;
 	unsigned long baddr, last;
 	struct vm_struct *area;
@@ -627,7 +630,7 @@ marvel_ioremap(unsigned long addr, unsigned long size)
 	unsigned long pfn;
 
 	/*
-	 * Adjust the addr
+	 * Adjust the addr.
 	 */ 
 #ifdef CONFIG_VGA_HOSE
 	if (pci_vga_hose && __marvel_is_mem_vga(addr)) {
@@ -638,15 +641,17 @@ marvel_ioremap(unsigned long addr, unsigned long size)
 	if (!marvel_is_ioaddr(addr)) return 0UL;
 
 	/*
-	 * Find the hose
+	 * Find the hose.
 	 */
-	for(hose = hose_head; hose; hose = hose->next) {
-		if ((addr >> 32) == (hose->mem_space->start >> 32)) break; 
+	for (hose = hose_head; hose; hose = hose->next) {
+		if ((addr >> 32) == (hose->mem_space->start >> 32))
+			break; 
 	}
-	if (!hose) return 0UL;
+	if (!hose)
+		return 0UL;
 
 	/*
-	 * We have the hose - calculate the bus limits
+	 * We have the hose - calculate the bus limits.
 	 */
 	baddr = addr - hose->mem_space->start;
 	last = baddr + size - 1;
@@ -659,7 +664,7 @@ marvel_ioremap(unsigned long addr, unsigned long size)
 		return IDENT_ADDR | (baddr - __direct_map_base);
 
 	/* 
-	 * Check the scatter-gather arena...
+	 * Check the scatter-gather arena.
 	 */
 	if (hose->sg_pci &&
 	    baddr >= (unsigned long)hose->sg_pci->dma_base &&
@@ -674,12 +679,12 @@ marvel_ioremap(unsigned long addr, unsigned long size)
 		size = PAGE_ALIGN(last) - baddr;
 
 		/*
-		 * Map it
+		 * Map it.
 		 */
 		area = get_vm_area(size, VM_IOREMAP);
 		if (!area) return (unsigned long)NULL;
 		ptes = hose->sg_pci->ptes;
-		for(vaddr = (unsigned long)area->addr; 
+		for (vaddr = (unsigned long)area->addr; 
 		    baddr <= last; 
 		    baddr += PAGE_SIZE, vaddr += PAGE_SIZE) {
 			pfn = ptes[baddr >> PAGE_SHIFT];
@@ -707,7 +712,7 @@ marvel_ioremap(unsigned long addr, unsigned long size)
 	}
 
 	/*
-	 * Not found - assume legacy ioremap
+	 * Not found - assume legacy ioremap.
 	 */
 	return addr;
 }
@@ -717,7 +722,8 @@ marvel_iounmap(unsigned long addr)
 {
 	if (((long)addr >> 41) == -2)
 		return;	/* kseg map, nothing to do */
-	if (addr) return vfree((void *)(PAGE_MASK & addr)); 
+	if (addr)
+		return vfree((void *)(PAGE_MASK & addr)); 
 }
 
 
@@ -726,17 +732,16 @@ marvel_iounmap(unsigned long addr)
  *
  * Marvel doesn't have a real serial console -- it's either graphics or 
  * server management based. If we're running on the server management based
- * console, allow the srmcons callback driver to be a console device
+ * console, allow the srmcons callback driver to be a console device.
  */
-int marvel_srmcons_allowed(void)
+int
+marvel_srmcons_allowed(void)
 {
 	u64 *pu64 = (u64 *)((u64)hwrpb + hwrpb->ctbt_offset);
 
-	if (pu64[7] == 2) return 1;
-	return 0;
+	return (pu64[7] == 2);
 }
 
-
 
 /*
  * RTC Support
@@ -747,7 +752,8 @@ struct marvel_rtc_access_info {
 	unsigned long data;
 };
 
-static void __marvel_access_rtc(void *info)
+static void
+__marvel_access_rtc(void *info)
 {
 	struct marvel_rtc_access_info *rtc_access = info;
 
@@ -765,7 +771,8 @@ static void __marvel_access_rtc(void *info)
 	rtc_access->data = __r0;
 }
 
-u8 __marvel_rtc_io(int write, u8 b, unsigned long addr)
+u8
+__marvel_rtc_io(int write, u8 b, unsigned long addr)
 {
 	struct marvel_rtc_access_info rtc_access = {0, };
 	static u8 index = 0;
@@ -807,7 +814,6 @@ u8 __marvel_rtc_io(int write, u8 b, unsigned long addr)
 	return ret;
 }
 
-
 
 /*
  * NUMA Support
@@ -817,7 +823,8 @@ u8 __marvel_rtc_io(int write, u8 b, unsigned long addr)
  *              -- no real support for striped mode 
  **********
  */
-int marvel_pa_to_nid(unsigned long pa)
+int
+marvel_pa_to_nid(unsigned long pa)
 {
 	int cpuid;
 
@@ -829,12 +836,14 @@ int marvel_pa_to_nid(unsigned long pa)
 	return marvel_cpuid_to_nid(cpuid);
 }
 
-int marvel_cpuid_to_nid(int cpuid)
+int
+marvel_cpuid_to_nid(int cpuid)
 {
 	return cpuid;
 }
 
-unsigned long marvel_node_mem_start(int nid)
+unsigned long
+marvel_node_mem_start(int nid)
 {
 	unsigned long pa;
 
@@ -844,14 +853,15 @@ unsigned long marvel_node_mem_start(int nid)
 	return pa;
 }
 
-unsigned long marvel_node_mem_size(int nid)
+unsigned long
+marvel_node_mem_size(int nid)
 {
 	return 16UL * 1024 * 1024 * 1024; /* 16GB */
 }
 
 
 /* 
- * AGP GART Support
+ * AGP GART Support.
  */
 #include <linux/agp_backend.h>
 #include <asm/agp_backend.h>
@@ -866,7 +876,8 @@ struct marvel_agp_aperture {
 	long pg_count;
 };
 
-static int marvel_agp_setup(alpha_agp_info *agp)
+static int
+marvel_agp_setup(alpha_agp_info *agp)
 {
 	struct marvel_agp_aperture *aper;
 
@@ -876,7 +887,7 @@ static int marvel_agp_setup(alpha_agp_info *agp)
 	aper->arena = agp->hose->sg_pci;
 	aper->pg_count = MARVEL_AGP_APER_SIZE / PAGE_SIZE;
 	aper->pg_start = iommu_reserve(aper->arena, aper->pg_count,
-                                       aper->pg_count - 1);
+				       aper->pg_count - 1);
 
 	if (aper->pg_start < 0) {
 		printk(KERN_ERR "Failed to reserve AGP memory\n");
@@ -892,7 +903,8 @@ static int marvel_agp_setup(alpha_agp_info *agp)
 	return 0;
 }
 
-static void marvel_agp_cleanup(alpha_agp_info *agp)
+static void
+marvel_agp_cleanup(alpha_agp_info *agp)
 {
 	struct marvel_agp_aperture *aper = agp->aperture.sysdata;
 	int status;
@@ -905,13 +917,15 @@ static void marvel_agp_cleanup(alpha_agp_info *agp)
 		status = iommu_release(aper->arena, aper->pg_start, 
 				       aper->pg_count);
 	}
-	if (status < 0) printk(KERN_ERR "Failed to release AGP memory\n");
+	if (status < 0)
+		printk(KERN_ERR "Failed to release AGP memory\n");
 
 	kfree(aper);
 	kfree(agp);
 }
 
-static int marvel_agp_configure(alpha_agp_info *agp)
+static int
+marvel_agp_configure(alpha_agp_info *agp)
 {
 	io7_ioport_csrs *csrs = ((struct io7_port *)agp->hose->sysdata)->csrs;
 	struct io7 *io7 = ((struct io7_port *)agp->hose->sysdata)->io7;
@@ -920,15 +934,15 @@ static int marvel_agp_configure(alpha_agp_info *agp)
 
 	/*
 	 * Check the requested mode against the PLL setting.
-	 * The agpgart_be code has not programmed the card yet, so we can
-	 * still tweak mode here 
+	 * The agpgart_be code has not programmed the card yet,
+	 * so we can still tweak mode here.
 	 */
 	agp_pll = io7->csrs->POx_RST[IO7_AGP_PORT].csr;
 	switch(IO7_PLL_RNGB(agp_pll)) {
 	case 0x4:				/* 2x only */
 		/* 
 		 * The PLL is only programmed for 2x, so adjust the
-		 * rate to 2x, if necessary
+		 * rate to 2x, if necessary.
 		 */
 		if (agp->mode.bits.rate != 2) 
 			new_rate = 2;
@@ -936,8 +950,8 @@ static int marvel_agp_configure(alpha_agp_info *agp)
 
 	case 0x6:				/* 1x / 4x */
 		/*
-		 * The PLL is programmed for 1x or 4x. Don't go faster
-		 * than requested, so if the requested rate is 2x, use 1x
+		 * The PLL is programmed for 1x or 4x.  Don't go faster
+		 * than requested, so if the requested rate is 2x, use 1x.
 		 */
 		if (agp->mode.bits.rate == 2) 
 			new_rate = 1;
@@ -946,7 +960,7 @@ static int marvel_agp_configure(alpha_agp_info *agp)
 	default:				/* ??????? */
 		/*
 		 * Don't know what this PLL setting is, take the requested
-		 * rate, but warn the user
+		 * rate, but warn the user.
 		 */
 		printk("%s: unknown PLL setting RNGB=%lx (PLL6_CTL=%016lx)\n",
 		       __FUNCTION__, IO7_PLL_RNGB(agp_pll), agp_pll);
@@ -954,7 +968,7 @@ static int marvel_agp_configure(alpha_agp_info *agp)
 	}
 
 	/*
-	 * Set the new rate, if necessary
+	 * Set the new rate, if necessary.
 	 */
 	if (new_rate) {
 		printk("Requested AGP Rate %dX not compatible "
@@ -1030,13 +1044,13 @@ marvel_agp_info(void)
 	struct io7 *io7;
 
 	/*
-	 * Find the first IO7 with an AGP card
+	 * Find the first IO7 with an AGP card.
 	 *
 	 * FIXME -- there should be a better way (we want to be able to
 	 * specify and what if the agp card is not video???)
 	 */
 	hose = NULL;
-	for(io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; ) {
+	for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; ) {
 		struct pci_controller *h;
 		vuip addr;
 
@@ -1054,20 +1068,21 @@ marvel_agp_info(void)
 
 	printk("MARVEL - using hose %d as AGP\n", hose->index);
 
-	if (!hose || !hose->sg_pci) return NULL;
+	if (!hose || !hose->sg_pci)
+		return NULL;
 
 	/* 
-	 * Get the csrs from the hose
+	 * Get the csrs from the hose.
 	 */
 	csrs = ((struct io7_port *)hose->sysdata)->csrs;
 
 	/*
-	 * Allocate the info structure
+	 * Allocate the info structure.
 	 */
 	agp = kmalloc(sizeof(*agp), GFP_KERNEL);
 
 	/*
-	 * Fill it in
+	 * Fill it in.
 	 */
 	agp->type = 0 /* FIXME: ALPHA_CORE_AGP */;
 	agp->hose = hose;
@@ -1075,14 +1090,14 @@ marvel_agp_info(void)
 	agp->ops = &marvel_agp_ops;
 
 	/*
-	 * Aperture - not configured until ops.setup()
+	 * Aperture - not configured until ops.setup().
 	 */
 	agp->aperture.bus_base = 0;
 	agp->aperture.size = 0;
 	agp->aperture.sysdata = NULL;
 
 	/*
-	 * Capabilities
+	 * Capabilities.
 	 *
 	 * NOTE: IO7 reports through AGP_STAT that it can support a read queue
 	 *       depth of 17 (rq = 0x10). It actually only supports a depth of
@@ -1092,7 +1107,7 @@ marvel_agp_info(void)
 	agp->capability.bits.rq = 0xf;
 	
 	/*
-	 * Mode
+	 * Mode.
 	 */
 	agp->mode.lw = csrs->AGP_CMD.csr;
 

arch/alpha/kernel/core_titan.c

@@ -56,20 +56,20 @@ struct
 /*
  * Routines to access TIG registers.
  */
-static volatile unsigned long *
+static inline volatile unsigned long *
 mk_tig_addr(int offset)
 {
 	return (volatile unsigned long *)(TITAN_TIG_SPACE + (offset << 6));
 }
 
-u8 
+static inline u8 
 titan_read_tig(int offset, u8 value)
 {
 	volatile unsigned long *tig_addr = mk_tig_addr(offset);
 	return (u8)(*tig_addr & 0xff);
 }
 
-void 
+static inline void 
 titan_write_tig(int offset, u8 value)
 {
 	volatile unsigned long *tig_addr = mk_tig_addr(offset);
@@ -207,7 +207,7 @@ titan_pci_tbi(struct pci_controller *hose, dma_addr_t start, dma_addr_t end)
 	volatile unsigned long *csr;
 	unsigned long value;
 
-	/* Get the right hose */
+	/* Get the right hose.  */
 	port = &pachip->g_port;
 	if (hose->index & 2) 
 		port = &pachip->a_port;
@@ -242,6 +242,7 @@ titan_query_agp(titan_pachip_port *port)
 	return pctl.pctl_r_bits.apctl_v_agp_present;
 
 }
+
 static void __init
 titan_init_one_pachip_port(titan_pachip_port *port, int index)
 {
@@ -308,7 +309,7 @@ titan_init_one_pachip_port(titan_pachip_port *port, int index)
 	/*
 	 * Set up the PCI to main memory translation windows.
 	 *
-	 * Note: Window 3 on Titan is Scatter-Gather ONLY
+	 * Note: Window 3 on Titan is Scatter-Gather ONLY.
 	 *
 	 * Window 0 is scatter-gather 8MB at 8MB (for isa)
 	 * Window 1 is direct access 1GB at 2GB
@@ -334,11 +335,11 @@ titan_init_one_pachip_port(titan_pachip_port *port, int index)
 
 	port->wsba[3].csr = 0;
 
-	/* Enable the Monster Window to make DAC pci64 possible. */
+	/* Enable the Monster Window to make DAC pci64 possible.  */
 	port->pctl.csr |= pctl_m_mwin;
 
 	/*
-	 * If it's an AGP port, initialize agplastwr
+	 * If it's an AGP port, initialize agplastwr.
 	 */
 	if (titan_query_agp(port)) 
 		port->port_specific.a.agplastwr.csr = __direct_map_base;
@@ -374,7 +375,7 @@ titan_init_vga_hose(void)
 		 * Our hose numbering matches the console's, so just find
 		 * the right one...
 		 */
-		for(hose = hose_head; hose; hose = hose->next) {
+		for (hose = hose_head; hose; hose = hose->next) {
 			if (hose->index == h) break;
 		}
 
@@ -413,14 +414,14 @@ titan_init_arch(void)
 	ioport_resource.end = ~0UL;
 	iomem_resource.end = ~0UL;
 
-	/* PCI DMA Direct Mapping is 1GB at 2GB */
+	/* PCI DMA Direct Mapping is 1GB at 2GB.  */
 	__direct_map_base = 0x80000000;
 	__direct_map_size = 0x40000000;
 
-	/* Init the PA chip(s) */
+	/* Init the PA chip(s).  */
 	titan_init_pachips(TITAN_pachip0, TITAN_pachip1);
 
-	/* Check for graphic console location (if any) */
+	/* Check for graphic console location (if any).  */
 	titan_init_vga_hose();
 }
 
@@ -450,8 +451,8 @@ titan_kill_pachips(titan_pachip *pachip0, titan_pachip *pachip1)
 	int pchip1_present = TITAN_cchip->csc.csr & 1L<<14;
 
 	if (pchip1_present) {
-		titan_kill_one_pachip_port(&pachip0->g_port, 1);
-		titan_kill_one_pachip_port(&pachip0->a_port, 3);
+		titan_kill_one_pachip_port(&pachip1->g_port, 1);
+		titan_kill_one_pachip_port(&pachip1->a_port, 3);
 	}
 	titan_kill_one_pachip_port(&pachip0->g_port, 0);
 	titan_kill_one_pachip_port(&pachip0->a_port, 2);
@@ -465,7 +466,7 @@ titan_kill_arch(int mode)
 
 
 /*
- * IO map support
+ * IO map support.
  */
 unsigned long
 titan_ioremap(unsigned long addr, unsigned long size)
@@ -480,7 +481,7 @@ titan_ioremap(unsigned long addr, unsigned long size)
 	unsigned long pfn;
 
 	/*
-	 * Adjust the addr
+	 * Adjust the addr.
 	 */ 
 #ifdef CONFIG_VGA_HOSE
 	if (pci_vga_hose && __titan_is_mem_vga(addr)) {
@@ -490,9 +491,9 @@ titan_ioremap(unsigned long addr, unsigned long size)
 #endif
 
 	/*
-	 * Find the hose 
+	 * Find the hose.
 	 */
-	for(hose = hose_head; hose; hose = hose->next)
+	for (hose = hose_head; hose; hose = hose->next)
 		if (hose->index == h) break;
 	if (!hose) return (unsigned long)NULL;
 
@@ -504,7 +505,7 @@ titan_ioremap(unsigned long addr, unsigned long size)
 		return addr - __direct_map_base + TITAN_MEM_BIAS;
 
 	/* 
-	 * Check the scatter-gather arena...
+	 * Check the scatter-gather arena.
 	 */
 	if (hose->sg_pci &&
 	    baddr >= (unsigned long)hose->sg_pci->dma_base &&
@@ -524,7 +525,7 @@ titan_ioremap(unsigned long addr, unsigned long size)
 		area = get_vm_area(size, VM_IOREMAP);
 		if (!area) return (unsigned long)NULL;
 		ptes = hose->sg_pci->ptes;
-		for(vaddr = (unsigned long)area->addr; 
+		for (vaddr = (unsigned long)area->addr; 
 		    baddr <= last; 
 		    baddr += PAGE_SIZE, vaddr += PAGE_SIZE) {
 			pfn = ptes[baddr >> PAGE_SHIFT];
@@ -551,7 +552,7 @@ titan_ioremap(unsigned long addr, unsigned long size)
 	}
 
 	/*
-	 * Not found - assume legacy ioremap
+	 * Not found - assume legacy ioremap.
 	 */
 	return addr + TITAN_MEM_BIAS;
 
@@ -562,16 +563,16 @@ titan_iounmap(unsigned long addr)
 {
 	if (((long)addr >> 41) == -2)
 		return;	/* kseg map, nothing to do */
-	if (addr) return vfree((void *)(PAGE_MASK & addr)); 
+	if (addr)
+		vfree((void *)(PAGE_MASK & addr)); 
 }
 
 EXPORT_SYMBOL(titan_ioremap);
 EXPORT_SYMBOL(titan_iounmap);
 
 /*
- * AGP GART Support
+ * AGP GART Support.
  */
-#if defined(CONFIG_ALPHA_CORE_AGP)
 #include <linux/agp_backend.h>
 #include <asm/agp_backend.h>
 #include <linux/slab.h>
@@ -585,12 +586,14 @@ struct titan_agp_aperture {
 	long pg_count;
 };
 
-static int titan_agp_setup(alpha_agp_info *agp)
+static int
+titan_agp_setup(alpha_agp_info *agp)
 {
 	struct titan_agp_aperture *aper;
 
 	aper = kmalloc(sizeof(struct titan_agp_aperture), GFP_KERNEL);
-	if (aper == NULL) return -ENOMEM;
+	if (aper == NULL)
+		return -ENOMEM;
 
 	aper->arena = agp->hose->sg_pci;
 	aper->pg_count = TITAN_AGP_APER_SIZE / PAGE_SIZE;
@@ -610,7 +613,8 @@ static int titan_agp_setup(alpha_agp_info *agp)
 	return 0;
 }
 
-static void titan_agp_cleanup(alpha_agp_info *agp)
+static void
+titan_agp_cleanup(alpha_agp_info *agp)
 {
 	struct titan_agp_aperture *aper = agp->aperture.sysdata;
 	int status;
@@ -623,13 +627,15 @@ static void titan_agp_cleanup(alpha_agp_info *agp)
 		status = iommu_release(aper->arena, aper->pg_start, 
 				       aper->pg_count);
 	}
-	if (status < 0) printk(KERN_ERR "Failed to release AGP memory\n");
+	if (status < 0)
+		printk(KERN_ERR "Failed to release AGP memory\n");
 
 	kfree(aper);
 	kfree(agp);
 }
 
-static int titan_agp_configure(alpha_agp_info *agp)
+static int
+titan_agp_configure(alpha_agp_info *agp)
 {
 	union TPAchipPCTL pctl;
 	titan_pachip_port *port = agp->private;
@@ -652,19 +658,19 @@ static int titan_agp_configure(alpha_agp_info *agp)
 	pctl.pctl_r_bits.apctl_v_agp_lp_rd = 7;
 
 	/*
-	 * AGP Enable
+	 * AGP Enable.
 	 */
 	pctl.pctl_r_bits.apctl_v_agp_en = agp->mode.bits.enable;
 
-	/* Tell the user... */
+	/* Tell the user.  */
 	printk("Enabling AGP: %dX%s\n", 
 	       1 << pctl.pctl_r_bits.apctl_v_agp_rate,
 	       pctl.pctl_r_bits.apctl_v_agp_sba_en ? " - SBA" : "");
 	       
-	/* Write it */
+	/* Write it.  */
 	port->pctl.csr = pctl.pctl_q_whole;
 	
-	/* And wait at least 5000 66MHz cycles (per Titan spec) */
+	/* And wait at least 5000 66MHz cycles (per Titan spec).  */
 	udelay(100);
 
 	return 0;
@@ -721,7 +727,6 @@ struct alpha_agp_ops titan_agp_ops =
 alpha_agp_info *
 titan_agp_info(void)
 {
-	extern struct pci_controller *hose_head;
 	alpha_agp_info *agp;
 	struct pci_controller *hose;
 	titan_pachip_port *port;
@@ -729,7 +734,7 @@ titan_agp_info(void)
 	union TPAchipPCTL pctl;
 
 	/*
-	 * Find the AGP port
+	 * Find the AGP port.
 	 */
 	port = &TITAN_pachip0->a_port;
 	if (titan_query_agp(port))
@@ -739,21 +744,22 @@ titan_agp_info(void)
 		hosenum = 3;
 	
 	/*
-	 * Find the hose the port is on
+	 * Find the hose the port is on.
 	 */
-	for(hose = hose_head; hose; hose = hose->next) {
-		if (hose->index == hosenum) break;
-	}
+	for (hose = hose_head; hose; hose = hose->next)
+		if (hose->index == hosenum)
+			break;
 
-	if (!hose || !hose->sg_pci) return NULL;
+	if (!hose || !hose->sg_pci)
+		return NULL;
 
 	/*
-	 * Allocate the info structure
+	 * Allocate the info structure.
 	 */
 	agp = kmalloc(sizeof(*agp), GFP_KERNEL);
 
 	/*
-	 * Fill it in
+	 * Fill it in.
 	 */
 	agp->type = 0 /* FIXME: ALPHA_CORE_AGP */;
 	agp->hose = hose;
@@ -761,7 +767,7 @@ titan_agp_info(void)
 	agp->ops = &titan_agp_ops;
 
 	/*
-	 * Aperture - not configured until ops.setup()
+	 * Aperture - not configured until ops.setup().
 	 *
 	 * FIXME - should we go ahead and allocate it here?
 	 */
@@ -770,7 +776,7 @@ titan_agp_info(void)
 	agp->aperture.sysdata = NULL;
 
 	/*
-	 * Capabilities
+	 * Capabilities.
 	 */
 	agp->capability.lw = 0;
 	agp->capability.bits.rate = 3; 	/* 2x, 1x */
@@ -778,7 +784,7 @@ titan_agp_info(void)
 	agp->capability.bits.rq = 7;	/* 8 - 1 */
 
 	/*
-	 * Mode
+	 * Mode.
 	 */
 	pctl.pctl_q_whole = port->pctl.csr;
 	agp->mode.lw = 0;
@@ -789,4 +795,3 @@ titan_agp_info(void)
 
 	return agp;
 }
-#endif /* CONFIG_ALPHA_CORE_AGP */

arch/alpha/kernel/core_tsunami.c

@@ -357,7 +357,6 @@ void __init
 tsunami_init_arch(void)
 {
 #ifdef NXM_MACHINE_CHECKS_ON_TSUNAMI
-	extern asmlinkage void entInt(void);
 	unsigned long tmp;
 	
 	/* Ho hum.. init_arch is called before init_IRQ, but we need to be

arch/alpha/kernel/err_marvel.c

@@ -18,8 +18,6 @@
 #include "err_impl.h"
 #include "proto.h"
 
-
-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_MARVEL)
 
 void
 marvel_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
@@ -32,9 +30,7 @@ marvel_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
 	mb();
 	draina();
 
-srm_printk("MARVEL MACHINE CHECK!!!\n");  /* HACK */
 	el_process_subpacket(el_ptr);
-srm_printk("...PROCESSED\n");		  /* HACK */
 
 	switch(vector) {
 	case SCB_Q_SYSEVENT:
@@ -44,13 +40,12 @@ srm_printk("...PROCESSED\n");		  /* HACK */
 	case SCB_Q_SYSERR:
 		printk(KERN_CRIT "MARVEL SYSMCHK/ERR %ld\n", vector);
 		break;
-	default:	/* don't know it - pass it up */
+	default:
+		/* Don't know it - pass it up.  */
 		return ev7_machine_check(vector, la_ptr, regs);
 	}	
 
-        /* 
-	 * Release the logout frame 
-	 */
+        /* Release the logout frame.  */
 	wrmces(0x7);
 	mb();
 }
@@ -60,4 +55,3 @@ marvel_register_error_handlers(void)
 {
 	ev7_register_error_handlers();
 }
-#endif /* CONFIG_ALPHA_GENERIC || CONFIG_ALPHA_MARVEL */

arch/alpha/kernel/err_titan.c

@@ -18,12 +18,6 @@
 #include "err_impl.h"
 #include "proto.h"
 
-
-/*
- * Titan generic
- */
-
-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_TITAN)
 
 static int
 titan_parse_c_misc(u64 c_misc, int print)
@@ -253,7 +247,7 @@ titan_parse_p_perror(int which, int port, u64 perror, int print)
 	if (perror & TITAN__PCHIP_PERROR__LOST)
 		printk("%s    Lost Error\n", err_print_prefix);
 	printk("%s      Command: 0x%x - %s\n"
-	         "      Address: 0x%lx\n",
+		 "      Address: 0x%lx\n",
 	       err_print_prefix,
 	       cmd, perror_cmd[cmd],
 	       addr);
@@ -336,7 +330,7 @@ titan_parse_p_agperror(int which, u64 agperror, int print)
 	if (agperror & TITAN__PCHIP_AGPERROR__LOST)
 		printk("%s    Lost Error\n", err_print_prefix);
 	printk("%s      Command: 0x%x - %s, %d Quadwords%s\n"
-	         "      Address: 0x%lx\n",
+		 "      Address: 0x%lx\n",
 	       err_print_prefix, cmd, agperror_cmd[cmd], len,
 	       (agperror & TITAN__PCHIP_AGPERROR__FENCE) ? ", FENCE" : "",
 	       addr);
@@ -389,7 +383,7 @@ titan_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
 		((unsigned long)mchk_header + mchk_header->sys_offset);
 	u64 irqmask;
 
-        /*
+	/*
 	 * Mask of Titan interrupt sources which are reported as machine checks
 	 *
 	 * 63 - CChip Error
@@ -545,7 +539,7 @@ el_process_regatta_subpacket(struct el_subpacket *header)
 		       err_print_prefix,
 		       (int)header->by_type.regatta_frame.cpuid);
 		status = privateer_process_logout_frame((struct el_common *)
-                        header->by_type.regatta_frame.data_start, 1);
+			header->by_type.regatta_frame.data_start, 1);
 		break;
 	default:
 		printk("%s  ** REGATTA TYPE %d SUBPACKET\n", 
@@ -559,31 +553,25 @@ el_process_regatta_subpacket(struct el_subpacket *header)
 } 
 
 static struct el_subpacket_handler titan_subpacket_handler = 
-        SUBPACKET_HANDLER_INIT(EL_CLASS__REGATTA_FAMILY, 
+	SUBPACKET_HANDLER_INIT(EL_CLASS__REGATTA_FAMILY, 
 			       el_process_regatta_subpacket);
 
 void
 titan_register_error_handlers(void)
 {
-	int i;
+	size_t i;
 
-	for(i = 0; 
-	    i < sizeof(el_titan_annotations)/sizeof(el_titan_annotations[1]); 
-	    i++) {
+	for (i = 0; i < ARRAY_SIZE (el_titan_annotations); i++)
 		cdl_register_subpacket_annotation(&el_titan_annotations[i]);
-	}
 
 	cdl_register_subpacket_handler(&titan_subpacket_handler);
 }
-#endif /* CONFIG_ALPHA_GENERIC || CONFIG_ALPHA_TITAN */
 
 
 /*
  * Privateer
  */
 
-#if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_TITAN)
-
 static int
 privateer_process_680_frame(struct el_common *mchk_header, int print)
 {
@@ -601,14 +589,14 @@ privateer_process_680_frame(struct el_common *mchk_header, int print)
 	/* TODO - decode instead of just dumping... */
 	printk("%s  Summary Flags:         %016lx\n"
  	         "  CChip DIRx:            %016lx\n"
-	         "  System Management IR:  %016lx\n"
-	         "  CPU IR:                %016lx\n"
-	         "  Power Supply IR:       %016lx\n"
-	         "  LM78 Fault Status:     %016lx\n"
-	         "  System Doors:          %016lx\n"
-	         "  Temperature Warning:   %016lx\n"
-	         "  Fan Control:           %016lx\n"
-	         "  Fatal Power Down Code: %016lx\n",
+		 "  System Management IR:  %016lx\n"
+		 "  CPU IR:                %016lx\n"
+		 "  Power Supply IR:       %016lx\n"
+		 "  LM78 Fault Status:     %016lx\n"
+		 "  System Doors:          %016lx\n"
+		 "  Temperature Warning:   %016lx\n"
+		 "  Fan Control:           %016lx\n"
+		 "  Fatal Power Down Code: %016lx\n",
 	       err_print_prefix,
 	       emchk->summary,
 	       emchk->c_dirx,
@@ -632,7 +620,7 @@ privateer_process_logout_frame(struct el_common *mchk_header, int print)
 		(struct el_common_EV6_mcheck *)mchk_header;
 	int status = MCHK_DISPOSITION_UNKNOWN_ERROR;
 
-        /*
+	/*
 	 * Machine check codes
 	 */
 #define PRIVATEER_MCHK__CORR_ECC		0x86	/* 630 */
@@ -717,13 +705,13 @@ privateer_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
 #define PRIVATEER_HOTPLUG_INTERRUPT_MASK	(0xE00UL)
 
 	/*
-	 * Sync the processor
+	 * Sync the processor.
 	 */
 	mb();
 	draina();
 
 	/* 
-	 * Only handle system events here 
+	 * Only handle system events here.
 	 */
 	if (vector != SCB_Q_SYSEVENT) 
 		return titan_machine_check(vector, la_ptr, regs);
@@ -742,23 +730,18 @@ privateer_machine_check(u64 vector, u64 la_ptr, struct pt_regs *regs)
 	
 	/* 
 	 * Convert any pending interrupts which report as 680 machine
-	 * checks to interrupts
+	 * checks to interrupts.
 	 */
 	irqmask = tmchk->c_dirx & PRIVATEER_680_INTERRUPT_MASK;
 
 	/*
-	 * Dispatch the interrupt(s)
+	 * Dispatch the interrupt(s).
 	 */
 	titan_dispatch_irqs(irqmask, regs);
 
-        /* 
-	 * Release the logout frame 
+	/* 
+	 * Release the logout frame.
 	 */
 	wrmces(0x7);
 	mb();
 }
-
-#endif /* CONFIG_ALPHA_GENERIC || CONFIG_ALPHA_TITAN */
-
-
-

arch/alpha/kernel/gct.c

+/*
+ *	linux/arch/alpha/kernel/gct.c
+ */
+
 #include <linux/config.h>
 #include <linux/kernel.h>
 #include <linux/types.h>
@@ -12,32 +16,33 @@ gct6_find_nodes(gct6_node *node, gct6_search_struct *search)
 	gct6_search_struct *wanted;
 	int status = 0;
 
-	/* first check the magic number */
+	/* First check the magic number.  */
 	if (node->magic != GCT_NODE_MAGIC) {
 		printk(KERN_ERR "GCT Node MAGIC incorrect - GCT invalid\n");
 		return -EINVAL;
 	}
 
-	/* check against the search struct */
-	for(wanted = search; 
-	    wanted && (wanted->type | wanted->subtype); 
-	    wanted++) {
-		if (node->type != wanted->type) continue;
-		if (node->subtype != wanted->subtype) continue;
-
-		/* found it -- call out */
-		if (wanted->callout) wanted->callout(node);
+	/* Check against the search struct.  */
+	for (wanted = search; 
+	     wanted && (wanted->type | wanted->subtype); 
+	     wanted++) {
+		if (node->type != wanted->type)
+			continue;
+		if (node->subtype != wanted->subtype)
+			continue;
+
+		/* Found it -- call out.  */
+		if (wanted->callout)
+			wanted->callout(node);
 	}
 
-	/* now walk the tree, siblings first.. */
+	/* Now walk the tree, siblings first.  */
 	if (node->next) 
 		status |= gct6_find_nodes(GCT_NODE_PTR(node->next), search);
 
-	/* then the children */
+	/* Then the children.  */
 	if (node->child) 
 		status |= gct6_find_nodes(GCT_NODE_PTR(node->child), search);
 
 	return status;
 }
-
-

arch/alpha/kernel/osf_sys.c

@@ -825,7 +825,7 @@ extern struct timezone sys_tz;
 extern int do_sys_settimeofday(struct timeval *tv, struct timezone *tz);
 extern int do_getitimer(int which, struct itimerval *value);
 extern int do_setitimer(int which, struct itimerval *, struct itimerval *);
-asmlinkage int sys_utimes(char *, struct timeval *);
+extern asmlinkage int sys_utimes(char *, struct timeval *);
 extern int do_adjtimex(struct timex *);
 
 struct timeval32

arch/alpha/kernel/pci_impl.h

@@ -150,6 +150,9 @@ struct pci_iommu_arena
 extern struct pci_controller *hose_head, **hose_tail;
 extern struct pci_controller *pci_isa_hose;
 
+/* Indicate that we trust the console to configure things properly.  */
+extern int pci_probe_only;
+
 extern void common_init_pci(void);
 extern u8 common_swizzle(struct pci_dev *, u8 *);
 extern struct pci_controller *alloc_pci_controller(void);

arch/alpha/kernel/proto.h

 #include <linux/config.h>
+
+
 /* Prototypes of functions used across modules here in this directory.  */
 
 #define vucp	volatile unsigned char  *
@@ -52,6 +54,10 @@ extern int marvel_cpuid_to_nid(int);
 extern unsigned long marvel_node_mem_start(int);
 extern unsigned long marvel_node_mem_size(int);
 extern int marvel_srmcons_allowed(void);
+extern struct _alpha_agp_info *marvel_agp_info(void);
+struct io7 *marvel_find_io7(int pe);
+struct io7 *marvel_next_io7(struct io7 *prev);
+void io7_clear_errors(struct io7 *io7);
 
 /* core_mcpcia.c */
 extern struct pci_ops mcpcia_pci_ops;
@@ -80,6 +86,7 @@ extern void titan_init_arch(void);
 extern void titan_kill_arch(int);
 extern void titan_machine_check(u64, u64, struct pt_regs *);
 extern void titan_pci_tbi(struct pci_controller *, dma_addr_t, dma_addr_t);
+extern struct _alpha_agp_info *titan_agp_info(void);
 
 /* core_tsunami.c */
 extern struct pci_ops tsunami_pci_ops;
@@ -161,6 +168,9 @@ extern int ptrace_cancel_bpt (struct task_struct *child);
 extern void dik_show_regs(struct pt_regs *regs, unsigned long *r9_15);
 extern void die_if_kernel(char *, struct pt_regs *, long, unsigned long *);
 
+/* sys_titan.c */
+extern void titan_dispatch_irqs(u64, struct pt_regs *);
+
 /* ../mm/init.c */
 extern void switch_to_system_map(void);
 extern void srm_paging_stop(void);

arch/alpha/kernel/setup.c

@@ -290,7 +290,7 @@ setup_memory(void *kernel_end)
 	  (hwrpb->mddt_offset + (unsigned long) hwrpb);
 
 	for_each_mem_cluster(memdesc, cluster, i) {
-		printk("memcluster %d, usage %01lx, start %8lu, end %8lu\n",
+		printk("memcluster %lu, usage %01lx, start %8lu, end %8lu\n",
 		       i, cluster->usage, cluster->start_pfn,
 		       cluster->start_pfn + cluster->numpages);
 

arch/alpha/kernel/smp.c

@@ -83,7 +83,6 @@ cycles_t cacheflush_time;
 unsigned long cache_decay_ticks;
 
 extern void calibrate_delay(void);
-extern asmlinkage void entInt(void);
 
 
 

arch/alpha/kernel/sys_marvel.c

 /*
- * linux/arch/alpha/kernel/sys_io7.c
+ * linux/arch/alpha/kernel/sys_marvel.c
  *
  * Marvel / IO7 support
  */
+
 #include <linux/kernel.h>
 #include <linux/types.h>
 #include <linux/mm.h>
@@ -30,15 +31,7 @@
 
 
 /*
- * private functions in core_marvel.c
- */
-struct io7 *marvel_find_io7(int pe);
-struct io7 *marvel_next_io7(struct io7 *prev);
-void io7_clear_errors(struct io7 *io7);
-
-
-/*
- * Interrupt handling
+ * Interrupt handling.
  */
 #define IRQ_VEC_PE_SHIFT (10)
 #define IRQ_VEC_IRQ_MASK ((1 << IRQ_VEC_PE_SHIFT) - 1)
@@ -161,12 +154,14 @@ io7_end_irq(unsigned int irq)
 		io7_enable_irq(irq);
 }
 
-static void marvel_irq_noop(unsigned int irq) 
+static void
+marvel_irq_noop(unsigned int irq) 
 { 
 	return; 
 }
 
-static unsigned int marvel_irq_noop_return(unsigned int irq) 
+static unsigned int
+marvel_irq_noop_return(unsigned int irq) 
 { 
 	return 0; 
 }
@@ -291,7 +286,7 @@ init_io7_irqs(struct io7 *io7,
 	 * traverse the mesh, but if it's not an SMP kernel, they have to
 	 * go to the boot CPU. Send them all to the boot CPU for now,
 	 * as each secondary starts, it can redirect it's local device 
-	 * interrupts
+	 * interrupts.
 	 */
 	printk("  Interrupts reported to CPU at PE %u\n", boot_cpuid);
 
@@ -304,27 +299,27 @@ init_io7_irqs(struct io7 *io7,
 	io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, boot_cpuid);
 	io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, boot_cpuid);
 
-	/* set up the lsi irqs */
-	for(i = 0; i < 128; ++i) {
+	/* Set up the lsi irqs.  */
+	for (i = 0; i < 128; ++i) {
 		irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
 		irq_desc[base + i].handler = lsi_ops;
 	}
 
-	/* disable the implemented irqs in hardware */
-	for(i = 0; i < 0x60; ++i) 
+	/* Disable the implemented irqs in hardware.  */
+	for (i = 0; i < 0x60; ++i) 
 		init_one_io7_lsi(io7, i, boot_cpuid);
 
 	init_one_io7_lsi(io7, 0x74, boot_cpuid);
 	init_one_io7_lsi(io7, 0x75, boot_cpuid);
 
 
-	/* set up the msi irqs */
-	for(i = 128; i < (128 + 512); ++i) {
+	/* Set up the msi irqs.  */
+	for (i = 128; i < (128 + 512); ++i) {
 		irq_desc[base + i].status = IRQ_DISABLED | IRQ_LEVEL;
 		irq_desc[base + i].handler = msi_ops;
 	}
 
-	for(i = 0; i < 16; ++i)
+	for (i = 0; i < 16; ++i)
 		init_one_io7_msi(io7, i, boot_cpuid);
 
 	spin_unlock(&io7->irq_lock);
@@ -336,16 +331,15 @@ marvel_init_irq(void)
 	int i;
 	struct io7 *io7 = NULL;
 
-	/* reserve the legacy irqs */
-	for(i = 0; i < 16; ++i) {
+	/* Reserve the legacy irqs.  */
+	for (i = 0; i < 16; ++i) {
 		irq_desc[i].status = IRQ_DISABLED;
 		irq_desc[i].handler = &marvel_legacy_irq_type;
 	}
 
-	/* init the io7 irqs */
-	for(io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; ) {
+	/* Init the io7 irqs.  */
+	for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; )
 		init_io7_irqs(io7, &io7_lsi_irq_type, &io7_msi_irq_type);
-	}
 }
 
 static int 
@@ -401,7 +395,6 @@ marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 
 		printk("  forcing LSI interrupt on irq %d [0x%x]\n", irq, irq);
 #endif
-
 	}
 
 	irq += 16;				/* offset for legacy */
@@ -413,7 +406,6 @@ marvel_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 static void __init
 marvel_init_pci(void)
 {
-	extern int pci_probe_only;
 	struct io7 *io7;
 
 	marvel_register_error_handlers();
@@ -425,8 +417,8 @@ marvel_init_pci(void)
 	locate_and_init_vga(NULL);
 #endif
 
-	/* clear any io7 errors */
-	for(io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; ) 
+	/* Clear any io7 errors.  */
+	for (io7 = NULL; (io7 = marvel_next_io7(io7)) != NULL; ) 
 		io7_clear_errors(io7);
 }
 
@@ -443,37 +435,36 @@ marvel_smp_callin(void)
 	struct io7 *io7 = marvel_find_io7(cpuid);
 	unsigned int i;
 
-	if (io7) {
-		/* 
-		 * There is a local IO7 - redirect all of it's interrupts here
-		 */
-		printk("Redirecting IO7 interrupts to local CPU at PE %u\n",
-		       cpuid);
-
-		/* redirect the error IRQS here */
-		io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid);
-		io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid);
-		io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid);
-		io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid);
-		io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid);
-
-		/* redirect the implemented LSIs here */
-		for(i = 0; i < 0x60; ++i) 
-			io7_redirect_one_lsi(io7, i, cpuid);
-
-		io7_redirect_one_lsi(io7, 0x74, cpuid);
-		io7_redirect_one_lsi(io7, 0x75, cpuid);
-
-		/* redirect the MSIs here */
-		for(i = 0; i < 16; ++i)
-			io7_redirect_one_msi(io7, i, cpuid);
-	}
+	if (!io7)
+		return;
+
+	/* 
+	 * There is a local IO7 - redirect all of it's interrupts here.
+	 */
+	printk("Redirecting IO7 interrupts to local CPU at PE %u\n", cpuid);
+
+	/* Redirect the error IRQS here.  */
+	io7_redirect_irq(io7, &io7->csrs->HLT_CTL.csr, cpuid);
+	io7_redirect_irq(io7, &io7->csrs->HPI_CTL.csr, cpuid);
+	io7_redirect_irq(io7, &io7->csrs->CRD_CTL.csr, cpuid);
+	io7_redirect_irq(io7, &io7->csrs->STV_CTL.csr, cpuid);
+	io7_redirect_irq(io7, &io7->csrs->HEI_CTL.csr, cpuid);
+
+	/* Redirect the implemented LSIs here.  */
+	for (i = 0; i < 0x60; ++i) 
+		io7_redirect_one_lsi(io7, i, cpuid);
+
+	io7_redirect_one_lsi(io7, 0x74, cpuid);
+	io7_redirect_one_lsi(io7, 0x75, cpuid);
+
+	/* Redirect the MSIs here.  */
+	for (i = 0; i < 16; ++i)
+		io7_redirect_one_msi(io7, i, cpuid);
 }
 
 /*
  * System Vectors
  */
-extern void *marvel_agp_info(void);
 struct alpha_machine_vector marvel_ev7_mv __initmv = {
 	.vector_name		= "MARVEL/EV7",
 	DO_EV7_MMU,
@@ -506,5 +497,3 @@ struct alpha_machine_vector marvel_ev7_mv __initmv = {
 	.node_mem_size		= marvel_node_mem_size,
 };
 ALIAS_MV(marvel_ev7)
-
-

arch/alpha/kernel/sys_titan.c

@@ -187,7 +187,7 @@ static void __init
 init_titan_irqs(struct hw_interrupt_type * ops, int imin, int imax)
 {
 	long i;
-	for(i = imin; i <= imax; ++i) {
+	for (i = imin; i <= imax; ++i) {
 		irq_desc[i].status = IRQ_DISABLED | IRQ_LEVEL;
 		irq_desc[i].handler = ops;
 	}
@@ -255,7 +255,7 @@ titan_dispatch_irqs(u64 mask, struct pt_regs *regs)
 	/*
 	 * Dispatch all requested interrupts 
 	 */
-	while(mask) {
+	while (mask) {
 		/* convert to SRM vector... priority is <63> -> <0> */
 		__asm__("ctlz %1, %0" : "=r"(vector) : "r"(mask));
 		vector = 63 - vector;
@@ -291,12 +291,12 @@ titan_late_init(void)
 		    "PChip 1 C_Error", NULL);
 
 	/* 
-	 * Register our error handlers 
+	 * Register our error handlers.
 	 */
 	titan_register_error_handlers();
 
 	/*
-	 * Check if the console left us any error logs
+	 * Check if the console left us any error logs.
 	 */
 	cdl_check_console_data_log();
 
@@ -308,23 +308,21 @@ titan_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 	u8 intline;
 	int irq;
 
- 	/* get the current intline */
+ 	/* Get the current intline.  */
 	pci_read_config_byte(dev, PCI_INTERRUPT_LINE, &intline);
 	irq = intline;
 
- 	/* is it explicitly routed through ISA? */
+ 	/* Is it explicitly routed through ISA?  */
  	if ((irq & 0xF0) == 0xE0)
  		return irq;
  
- 	/* offset by 16 to make room for ISA interrupts 0 - 15 */
+ 	/* Offset by 16 to make room for ISA interrupts 0 - 15.  */
  	return irq + 16;
 }
 
 static void __init
 titan_init_pci(void)
 {
-	extern int pci_probe_only;
-
  	/*
  	 * This isn't really the right place, but there's some init
  	 * that needs to be done after everything is basically up.
@@ -348,7 +346,7 @@ privateer_init_pci(void)
 {
 	/*
 	 * Hook a couple of extra err interrupts that the
-	 * common titan code won't
+	 * common titan code won't.
 	 */
 	request_irq(53+16, titan_intr_nop, SA_INTERRUPT, 
 		    "NMI", NULL);
@@ -356,20 +354,15 @@ privateer_init_pci(void)
 		    "Temperature Warning", NULL);
 
 	/*
-	 * Finish with the common version
+	 * Finish with the common version.
 	 */
 	return titan_init_pci();
 }
 
 
 /*
- * The System Vectors
+ * The System Vectors.
  */
-
-#if defined(CONFIG_ALPHA_CORE_AGP)
-  extern void *titan_agp_info(void);
-#endif
-
 struct alpha_machine_vector titan_mv __initmv = {
 	.vector_name		= "TITAN",
 	DO_EV6_MMU,
@@ -385,9 +378,7 @@ struct alpha_machine_vector titan_mv __initmv = {
 	.nr_irqs		= 80,	/* 64 + 16 */
 	/* device_interrupt will be filled in by titan_init_irq */
 
-#if defined(CONFIG_ALPHA_CORE_AGP)
 	.agp_info		= titan_agp_info,
-#endif
 
 	.init_arch		= titan_init_arch,
 	.init_irq		= titan_legacy_init_irq,
@@ -415,9 +406,7 @@ struct alpha_machine_vector privateer_mv __initmv = {
 	.nr_irqs		= 80,	/* 64 + 16 */
 	/* device_interrupt will be filled in by titan_init_irq */
 
-#if defined(CONFIG_ALPHA_CORE_AGP)
 	.agp_info		= titan_agp_info,
-#endif
 
 	.init_arch		= titan_init_arch,
 	.init_irq		= titan_legacy_init_irq,
@@ -430,4 +419,3 @@ struct alpha_machine_vector privateer_mv __initmv = {
 };
 /* No alpha_mv alias for privateer since we compile it 
    in unconditionally with titan; setup_arch knows how to cope. */
-

arch/alpha/kernel/traps.c

@@ -118,7 +118,7 @@ dik_show_trace(unsigned long *sp)
 	long i = 0;
 	printk("Trace:");
 	while (0x1ff8 & (unsigned long) sp) {
-		extern unsigned long _stext, _etext;
+		extern char _stext[], _etext[];
 		unsigned long tmp = *sp;
 		sp++;
 		if (tmp < (unsigned long) &_stext)