Commit e660b2f2 authored by Robert Baldyga's avatar Robert Baldyga Committed by Zefan Li

serial: samsung: wait for transfer completion before clock disable

commit 1ff383a4 upstream.

This patch adds waiting until transmit buffer and shifter will be empty
before clock disabling.

Without this fix it's possible to have clock disabled while data was
not transmited yet, which causes unproper state of TX line and problems
in following data transfers.
Signed-off-by: default avatarRobert Baldyga <r.baldyga@samsung.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
[lizf: Backported to 3.4: adjust context]
Signed-off-by: default avatarZefan Li <lizefan@huawei.com>
parent 9de18f8e
......@@ -524,11 +524,15 @@ static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level,
unsigned int old)
{
struct s3c24xx_uart_port *ourport = to_ourport(port);
int timeout = 10000;
ourport->pm_level = level;
switch (level) {
case 3:
while (--timeout && !s3c24xx_serial_txempty_nofifo(port))
udelay(100);
if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL)
clk_disable(ourport->baudclk);
......
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