Commit e661faa4 authored by Kukjin Kim's avatar Kukjin Kim

ARM: S5P64X0: Update Audio support

This patch updates Audio and SPI for S5P6440 and S5P6450 SoCs.
Signed-off-by: default avatarKukjin Kim <kgene.kim@samsung.com>
Cc: Jassi Brar <jassi.brar@samsung.com>
parent 8c14482b
/* linux/arch/arm/mach-s5p6440/dev-audio.c /* linux/arch/arm/mach-s5p64x0/dev-audio.c
* *
* Copyright (c) 2010 Samsung Electronics Co. Ltd * Copyright (c) 2010 Samsung Electronics Co. Ltd
* Jaswinder Singh <jassi.brar@samsung.com> * Jaswinder Singh <jassi.brar@samsung.com>
...@@ -6,7 +6,7 @@ ...@@ -6,7 +6,7 @@
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
...@@ -41,35 +41,72 @@ static int s5p6440_cfg_i2s(struct platform_device *pdev) ...@@ -41,35 +41,72 @@ static int s5p6440_cfg_i2s(struct platform_device *pdev)
return 0; return 0;
} }
static struct s3c_audio_pdata s3c_i2s_pdata = { static int s5p6450_cfg_i2s(struct platform_device *pdev)
{
/* configure GPIO for i2s port */
switch (pdev->id) {
case -1:
s3c_gpio_cfgpin(S5P6450_GPB(4), S3C_GPIO_SFN(5));
s3c_gpio_cfgpin(S5P6450_GPR(4), S3C_GPIO_SFN(5));
s3c_gpio_cfgpin(S5P6450_GPR(5), S3C_GPIO_SFN(5));
s3c_gpio_cfgpin(S5P6450_GPR(6), S3C_GPIO_SFN(5));
s3c_gpio_cfgpin(S5P6450_GPR(7), S3C_GPIO_SFN(5));
s3c_gpio_cfgpin(S5P6450_GPR(8), S3C_GPIO_SFN(5));
s3c_gpio_cfgpin(S5P6450_GPR(13), S3C_GPIO_SFN(5));
s3c_gpio_cfgpin(S5P6450_GPR(14), S3C_GPIO_SFN(5));
break;
default:
printk(KERN_ERR "Invalid Device %d\n", pdev->id);
return -EINVAL;
}
return 0;
}
static struct s3c_audio_pdata s5p6440_i2s_pdata = {
.cfg_gpio = s5p6440_cfg_i2s, .cfg_gpio = s5p6440_cfg_i2s,
}; };
static struct resource s5p6440_iis0_resource[] = { static struct s3c_audio_pdata s5p6450_i2s_pdata = {
.cfg_gpio = s5p6450_cfg_i2s,
};
static struct resource s5p64x0_iis0_resource[] = {
[0] = { [0] = {
.start = S5P6440_PA_I2S, .start = S5P64X0_PA_I2S,
.end = S5P6440_PA_I2S + 0x100 - 1, .end = S5P64X0_PA_I2S + 0x100 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = DMACH_I2S0_TX, .start = DMACH_I2S0_TX,
.end = DMACH_I2S0_TX, .end = DMACH_I2S0_TX,
.flags = IORESOURCE_DMA, .flags = IORESOURCE_DMA,
}, },
[2] = { [2] = {
.start = DMACH_I2S0_RX, .start = DMACH_I2S0_RX,
.end = DMACH_I2S0_RX, .end = DMACH_I2S0_RX,
.flags = IORESOURCE_DMA, .flags = IORESOURCE_DMA,
}, },
}; };
struct platform_device s5p6440_device_iis = { struct platform_device s5p6440_device_iis = {
.name = "s3c64xx-iis-v4", .name = "s3c64xx-iis-v4",
.id = -1, .id = -1,
.num_resources = ARRAY_SIZE(s5p6440_iis0_resource), .num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
.resource = s5p6440_iis0_resource, .resource = s5p64x0_iis0_resource,
.dev = {
.platform_data = &s5p6440_i2s_pdata,
},
};
struct platform_device s5p6450_device_iis0 = {
.name = "s3c64xx-iis-v4",
.id = -1,
.num_resources = ARRAY_SIZE(s5p64x0_iis0_resource),
.resource = s5p64x0_iis0_resource,
.dev = { .dev = {
.platform_data = &s3c_i2s_pdata, .platform_data = &s5p6450_i2s_pdata,
}, },
}; };
...@@ -94,34 +131,34 @@ static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev) ...@@ -94,34 +131,34 @@ static int s5p6440_pcm_cfg_gpio(struct platform_device *pdev)
return 0; return 0;
} }
static struct s3c_audio_pdata s3c_pcm_pdata = { static struct s3c_audio_pdata s5p6440_pcm_pdata = {
.cfg_gpio = s5p6440_pcm_cfg_gpio, .cfg_gpio = s5p6440_pcm_cfg_gpio,
}; };
static struct resource s5p6440_pcm0_resource[] = { static struct resource s5p6440_pcm0_resource[] = {
[0] = { [0] = {
.start = S5P6440_PA_PCM, .start = S5P64X0_PA_PCM,
.end = S5P6440_PA_PCM + 0x100 - 1, .end = S5P64X0_PA_PCM + 0x100 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = DMACH_PCM0_TX, .start = DMACH_PCM0_TX,
.end = DMACH_PCM0_TX, .end = DMACH_PCM0_TX,
.flags = IORESOURCE_DMA, .flags = IORESOURCE_DMA,
}, },
[2] = { [2] = {
.start = DMACH_PCM0_RX, .start = DMACH_PCM0_RX,
.end = DMACH_PCM0_RX, .end = DMACH_PCM0_RX,
.flags = IORESOURCE_DMA, .flags = IORESOURCE_DMA,
}, },
}; };
struct platform_device s5p6440_device_pcm = { struct platform_device s5p6440_device_pcm = {
.name = "samsung-pcm", .name = "samsung-pcm",
.id = 0, .id = 0,
.num_resources = ARRAY_SIZE(s5p6440_pcm0_resource), .num_resources = ARRAY_SIZE(s5p6440_pcm0_resource),
.resource = s5p6440_pcm0_resource, .resource = s5p6440_pcm0_resource,
.dev = { .dev = {
.platform_data = &s3c_pcm_pdata, .platform_data = &s5p6440_pcm_pdata,
}, },
}; };
/* linux/arch/arm/mach-s5p6440/dev-spi.c /* linux/arch/arm/mach-s5p64x0/dev-spi.c
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* *
* Copyright (C) 2010 Samsung Electronics Co. Ltd. * Copyright (C) 2010 Samsung Electronics Co. Ltd.
* Jaswinder Singh <jassi.brar@samsung.com> * Jaswinder Singh <jassi.brar@samsung.com>
...@@ -6,7 +9,7 @@ ...@@ -6,7 +9,7 @@
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#include <linux/platform_device.h> #include <linux/platform_device.h>
#include <linux/dma-mapping.h> #include <linux/dma-mapping.h>
...@@ -15,14 +18,15 @@ ...@@ -15,14 +18,15 @@
#include <mach/dma.h> #include <mach/dma.h>
#include <mach/map.h> #include <mach/map.h>
#include <mach/irqs.h> #include <mach/irqs.h>
#include <mach/regs-clock.h>
#include <mach/spi-clocks.h> #include <mach/spi-clocks.h>
#include <plat/s3c64xx-spi.h> #include <plat/s3c64xx-spi.h>
#include <plat/gpio-cfg.h> #include <plat/gpio-cfg.h>
static char *spi_src_clks[] = { static char *s5p64x0_spi_src_clks[] = {
[S5P6440_SPI_SRCCLK_PCLK] = "pclk", [S5P64X0_SPI_SRCCLK_PCLK] = "pclk",
[S5P6440_SPI_SRCCLK_SCLK] = "spi_epll", [S5P64X0_SPI_SRCCLK_SCLK] = "sclk_spi",
}; };
/* SPI Controller platform_devices */ /* SPI Controller platform_devices */
...@@ -62,107 +66,159 @@ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev) ...@@ -62,107 +66,159 @@ static int s5p6440_spi_cfg_gpio(struct platform_device *pdev)
return 0; return 0;
} }
static struct resource s5p6440_spi0_resource[] = { static int s5p6450_spi_cfg_gpio(struct platform_device *pdev)
{
switch (pdev->id) {
case 0:
s3c_gpio_cfgpin(S5P6450_GPC(0), S3C_GPIO_SFN(2));
s3c_gpio_cfgpin(S5P6450_GPC(1), S3C_GPIO_SFN(2));
s3c_gpio_cfgpin(S5P6450_GPC(2), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P6450_GPC(0), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5P6450_GPC(1), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5P6450_GPC(2), S3C_GPIO_PULL_UP);
break;
case 1:
s3c_gpio_cfgpin(S5P6450_GPC(4), S3C_GPIO_SFN(2));
s3c_gpio_cfgpin(S5P6450_GPC(5), S3C_GPIO_SFN(2));
s3c_gpio_cfgpin(S5P6450_GPC(6), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5P6450_GPC(4), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5P6450_GPC(5), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5P6450_GPC(6), S3C_GPIO_PULL_UP);
break;
default:
dev_err(&pdev->dev, "Invalid SPI Controller number!");
return -EINVAL;
}
return 0;
}
static struct resource s5p64x0_spi0_resource[] = {
[0] = { [0] = {
.start = S5P6440_PA_SPI0, .start = S5P64X0_PA_SPI0,
.end = S5P6440_PA_SPI0 + 0x100 - 1, .end = S5P64X0_PA_SPI0 + 0x100 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = DMACH_SPI0_TX, .start = DMACH_SPI0_TX,
.end = DMACH_SPI0_TX, .end = DMACH_SPI0_TX,
.flags = IORESOURCE_DMA, .flags = IORESOURCE_DMA,
}, },
[2] = { [2] = {
.start = DMACH_SPI0_RX, .start = DMACH_SPI0_RX,
.end = DMACH_SPI0_RX, .end = DMACH_SPI0_RX,
.flags = IORESOURCE_DMA, .flags = IORESOURCE_DMA,
}, },
[3] = { [3] = {
.start = IRQ_SPI0, .start = IRQ_SPI0,
.end = IRQ_SPI0, .end = IRQ_SPI0,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
static struct s3c64xx_spi_info s5p6440_spi0_pdata = { static struct s3c64xx_spi_info s5p6440_spi0_pdata = {
.cfg_gpio = s5p6440_spi_cfg_gpio, .cfg_gpio = s5p6440_spi_cfg_gpio,
.fifo_lvl_mask = 0x1ff, .fifo_lvl_mask = 0x1ff,
.rx_lvl_offset = 15, .rx_lvl_offset = 15,
};
static struct s3c64xx_spi_info s5p6450_spi0_pdata = {
.cfg_gpio = s5p6450_spi_cfg_gpio,
.fifo_lvl_mask = 0x1ff,
.rx_lvl_offset = 15,
}; };
static u64 spi_dmamask = DMA_BIT_MASK(32); static u64 spi_dmamask = DMA_BIT_MASK(32);
struct platform_device s5p6440_device_spi0 = { struct platform_device s5p64x0_device_spi0 = {
.name = "s3c64xx-spi", .name = "s3c64xx-spi",
.id = 0, .id = 0,
.num_resources = ARRAY_SIZE(s5p6440_spi0_resource), .num_resources = ARRAY_SIZE(s5p64x0_spi0_resource),
.resource = s5p6440_spi0_resource, .resource = s5p64x0_spi0_resource,
.dev = { .dev = {
.dma_mask = &spi_dmamask, .dma_mask = &spi_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32), .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &s5p6440_spi0_pdata,
}, },
}; };
static struct resource s5p6440_spi1_resource[] = { static struct resource s5p64x0_spi1_resource[] = {
[0] = { [0] = {
.start = S5P6440_PA_SPI1, .start = S5P64X0_PA_SPI1,
.end = S5P6440_PA_SPI1 + 0x100 - 1, .end = S5P64X0_PA_SPI1 + 0x100 - 1,
.flags = IORESOURCE_MEM, .flags = IORESOURCE_MEM,
}, },
[1] = { [1] = {
.start = DMACH_SPI1_TX, .start = DMACH_SPI1_TX,
.end = DMACH_SPI1_TX, .end = DMACH_SPI1_TX,
.flags = IORESOURCE_DMA, .flags = IORESOURCE_DMA,
}, },
[2] = { [2] = {
.start = DMACH_SPI1_RX, .start = DMACH_SPI1_RX,
.end = DMACH_SPI1_RX, .end = DMACH_SPI1_RX,
.flags = IORESOURCE_DMA, .flags = IORESOURCE_DMA,
}, },
[3] = { [3] = {
.start = IRQ_SPI1, .start = IRQ_SPI1,
.end = IRQ_SPI1, .end = IRQ_SPI1,
.flags = IORESOURCE_IRQ, .flags = IORESOURCE_IRQ,
}, },
}; };
static struct s3c64xx_spi_info s5p6440_spi1_pdata = { static struct s3c64xx_spi_info s5p6440_spi1_pdata = {
.cfg_gpio = s5p6440_spi_cfg_gpio, .cfg_gpio = s5p6440_spi_cfg_gpio,
.fifo_lvl_mask = 0x7f, .fifo_lvl_mask = 0x7f,
.rx_lvl_offset = 15, .rx_lvl_offset = 15,
};
static struct s3c64xx_spi_info s5p6450_spi1_pdata = {
.cfg_gpio = s5p6450_spi_cfg_gpio,
.fifo_lvl_mask = 0x7f,
.rx_lvl_offset = 15,
}; };
struct platform_device s5p6440_device_spi1 = { struct platform_device s5p64x0_device_spi1 = {
.name = "s3c64xx-spi", .name = "s3c64xx-spi",
.id = 1, .id = 1,
.num_resources = ARRAY_SIZE(s5p6440_spi1_resource), .num_resources = ARRAY_SIZE(s5p64x0_spi1_resource),
.resource = s5p6440_spi1_resource, .resource = s5p64x0_spi1_resource,
.dev = { .dev = {
.dma_mask = &spi_dmamask, .dma_mask = &spi_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32), .coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &s5p6440_spi1_pdata,
}, },
}; };
void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) void __init s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
{ {
unsigned int id;
struct s3c64xx_spi_info *pd; struct s3c64xx_spi_info *pd;
id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000;
/* Reject invalid configuration */ /* Reject invalid configuration */
if (!num_cs || src_clk_nr < 0 if (!num_cs || src_clk_nr < 0
|| src_clk_nr > S5P6440_SPI_SRCCLK_SCLK) { || src_clk_nr > S5P64X0_SPI_SRCCLK_SCLK) {
printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__); printk(KERN_ERR "%s: Invalid SPI configuration\n", __func__);
return; return;
} }
switch (cntrlr) { switch (cntrlr) {
case 0: case 0:
pd = &s5p6440_spi0_pdata; if (id == 0x50000)
pd = &s5p6450_spi0_pdata;
else
pd = &s5p6440_spi0_pdata;
s5p64x0_device_spi0.dev.platform_data = pd;
break; break;
case 1: case 1:
pd = &s5p6440_spi1_pdata; if (id == 0x50000)
pd = &s5p6450_spi1_pdata;
else
pd = &s5p6440_spi1_pdata;
s5p64x0_device_spi1.dev.platform_data = pd;
break; break;
default: default:
printk(KERN_ERR "%s: Invalid SPI controller(%d)\n", printk(KERN_ERR "%s: Invalid SPI controller(%d)\n",
...@@ -172,5 +228,5 @@ void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs) ...@@ -172,5 +228,5 @@ void __init s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs)
pd->num_cs = num_cs; pd->num_cs = num_cs;
pd->src_clk_nr = src_clk_nr; pd->src_clk_nr = src_clk_nr;
pd->src_clk_name = spi_src_clks[src_clk_nr]; pd->src_clk_name = s5p64x0_spi_src_clks[src_clk_nr];
} }
/* linux/arch/arm/mach-s5p6440/include/mach/spi-clocks.h /* linux/arch/arm/mach-s5p64x0/include/mach/spi-clocks.h
*
* Copyright (c) 2010 Samsung Electronics Co., Ltd.
* http://www.samsung.com
* *
* Copyright (C) 2010 Samsung Electronics Co. Ltd. * Copyright (C) 2010 Samsung Electronics Co. Ltd.
* Jaswinder Singh <jassi.brar@samsung.com> * Jaswinder Singh <jassi.brar@samsung.com>
...@@ -6,12 +9,12 @@ ...@@ -6,12 +9,12 @@
* This program is free software; you can redistribute it and/or modify * This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as * it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation. * published by the Free Software Foundation.
*/ */
#ifndef __S5P6440_PLAT_SPI_CLKS_H #ifndef __ASM_ARCH_SPI_CLKS_H
#define __S5P6440_PLAT_SPI_CLKS_H __FILE__ #define __ASM_ARCH_SPI_CLKS_H __FILE__
#define S5P6440_SPI_SRCCLK_PCLK 0 #define S5P64X0_SPI_SRCCLK_PCLK 0
#define S5P6440_SPI_SRCCLK_SCLK 1 #define S5P64X0_SPI_SRCCLK_SCLK 1
#endif /* __S5P6440_PLAT_SPI_CLKS_H */ #endif /* __ASM_ARCH_SPI_CLKS_H */
...@@ -67,6 +67,8 @@ extern struct platform_device s5pv210_device_spi0; ...@@ -67,6 +67,8 @@ extern struct platform_device s5pv210_device_spi0;
extern struct platform_device s5pv210_device_spi1; extern struct platform_device s5pv210_device_spi1;
extern struct platform_device s5p6440_device_spi0; extern struct platform_device s5p6440_device_spi0;
extern struct platform_device s5p6440_device_spi1; extern struct platform_device s5p6440_device_spi1;
extern struct platform_device s5p6450_device_spi0;
extern struct platform_device s5p6450_device_spi1;
extern struct platform_device s3c_device_hwmon; extern struct platform_device s3c_device_hwmon;
...@@ -95,6 +97,9 @@ extern struct platform_device s5p6442_device_spi; ...@@ -95,6 +97,9 @@ extern struct platform_device s5p6442_device_spi;
extern struct platform_device s5p6440_device_pcm; extern struct platform_device s5p6440_device_pcm;
extern struct platform_device s5p6440_device_iis; extern struct platform_device s5p6440_device_iis;
extern struct platform_device s5p6450_device_iis0;
extern struct platform_device s5p6450_device_pcm0;
extern struct platform_device s5pc100_device_ac97; extern struct platform_device s5pc100_device_ac97;
extern struct platform_device s5pc100_device_pcm0; extern struct platform_device s5pc100_device_pcm0;
extern struct platform_device s5pc100_device_pcm1; extern struct platform_device s5pc100_device_pcm1;
......
...@@ -65,7 +65,7 @@ struct s3c64xx_spi_info { ...@@ -65,7 +65,7 @@ struct s3c64xx_spi_info {
extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); extern void s3c64xx_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); extern void s5pc100_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); extern void s5pv210_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
extern void s5p6440_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); extern void s5p64x0_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs); extern void s5p6442_spi_set_info(int cntrlr, int src_clk_nr, int num_cs);
#endif /* __S3C64XX_PLAT_SPI_H */ #endif /* __S3C64XX_PLAT_SPI_H */
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