Commit e89c0d70 authored by Will Deacon's avatar Will Deacon Committed by Russell King

ARM: 6864/1: hw_breakpoint: clear DBGVCR out of reset

The DBGVCR, used for configuring vector catch debug events, is UNKNOWN
out of reset on ARMv7. When enabling monitor mode, this must be zeroed
to avoid UNPREDICTABLE behaviour.

This patch adds the zeroing code to the debug reset path.

Cc: stable <stable@kernel.org>
Reported-by: default avatarStepan Moskovchenko <stepanm@codeaurora.org>
Signed-off-by: default avatarWill Deacon <will.deacon@arm.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 6a786182
...@@ -868,6 +868,13 @@ static void reset_ctrl_regs(void *info) ...@@ -868,6 +868,13 @@ static void reset_ctrl_regs(void *info)
*/ */
asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0)); asm volatile("mcr p14, 0, %0, c1, c0, 4" : : "r" (0));
isb(); isb();
/*
* Clear any configured vector-catch events before
* enabling monitor mode.
*/
asm volatile("mcr p14, 0, %0, c0, c7, 0" : : "r" (0));
isb();
} }
if (enable_monitor_mode()) if (enable_monitor_mode())
......
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