Commit e8f0ff58 authored by Dinh Nguyen's avatar Dinh Nguyen Committed by Dinh Nguyen

ARM: dts: socfpga: enable qspi on the Cyclone5 devkit

Enable the qspi controller on the devkit and add the flash chip.
Signed-off-by: default avatarDinh Nguyen <dinguyen@opensource.altera.com>
parent d1da6635
...@@ -87,6 +87,39 @@ &mmc0 { ...@@ -87,6 +87,39 @@ &mmc0 {
status = "okay"; status = "okay";
}; };
&qspi {
status = "okay";
flash0: n25q00@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q00";
reg = <0>; /* chip select */
spi-max-frequency = <100000000>;
m25p,fast-read;
cdns,page-size = <256>;
cdns,block-size = <16>;
cdns,read-delay = <4>;
cdns,tshsl-ns = <50>;
cdns,tsd2d-ns = <50>;
cdns,tchsh-ns = <4>;
cdns,tslch-ns = <4>;
partition@qspi-boot {
/* 8MB for raw data. */
label = "Flash 0 Raw Data";
reg = <0x0 0x800000>;
};
partition@qspi-rootfs {
/* 120MB for jffs2 data. */
label = "Flash 0 jffs2 Filesystem";
reg = <0x800000 0x7800000>;
};
};
};
&usb1 { &usb1 {
status = "okay"; status = "okay";
}; };
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment