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Kirill Smelkov
linux
Commits
e9bcd470
Commit
e9bcd470
authored
Jun 28, 2012
by
Paul Mundt
Browse files
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Browse Files
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Plain Diff
Merge branches 'sh/urgent' and 'sh/trivial' into sh-fixes-for-linus
parents
bc404e91
ad3337cb
Changes
11
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Showing
11 changed files
with
11 additions
and
11 deletions
+11
-11
arch/sh/drivers/pci/pcie-sh7786.c
arch/sh/drivers/pci/pcie-sh7786.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7343.c
arch/sh/kernel/cpu/sh4a/clock-sh7343.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7366.c
arch/sh/kernel/cpu/sh4a/clock-sh7366.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7734.c
arch/sh/kernel/cpu/sh4a/clock-sh7734.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7757.c
arch/sh/kernel/cpu/sh4a/clock-sh7757.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7785.c
arch/sh/kernel/cpu/sh4a/clock-sh7785.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-sh7786.c
arch/sh/kernel/cpu/sh4a/clock-sh7786.c
+1
-1
arch/sh/kernel/cpu/sh4a/clock-shx3.c
arch/sh/kernel/cpu/sh4a/clock-shx3.c
+1
-1
No files found.
arch/sh/drivers/pci/pcie-sh7786.c
View file @
e9bcd470
...
@@ -239,7 +239,7 @@ static int __init pcie_clk_init(struct sh7786_pcie_port *port)
...
@@ -239,7 +239,7 @@ static int __init pcie_clk_init(struct sh7786_pcie_port *port)
clk
->
enable_reg
=
(
void
__iomem
*
)(
chan
->
reg_base
+
SH4A_PCIEPHYCTLR
);
clk
->
enable_reg
=
(
void
__iomem
*
)(
chan
->
reg_base
+
SH4A_PCIEPHYCTLR
);
clk
->
enable_bit
=
BITS_CKE
;
clk
->
enable_bit
=
BITS_CKE
;
ret
=
sh_clk_mstp
32
_register
(
clk
,
1
);
ret
=
sh_clk_mstp_register
(
clk
,
1
);
if
(
unlikely
(
ret
<
0
))
if
(
unlikely
(
ret
<
0
))
goto
err_phy
;
goto
err_phy
;
...
...
arch/sh/kernel/cpu/sh4a/clock-sh7343.c
View file @
e9bcd470
...
@@ -283,7 +283,7 @@ int __init arch_clk_init(void)
...
@@ -283,7 +283,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div6_register
(
div6_clks
,
DIV6_NR
);
ret
=
sh_clk_div6_register
(
div6_clks
,
DIV6_NR
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
MSTP_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
MSTP_NR
);
return
ret
;
return
ret
;
}
}
arch/sh/kernel/cpu/sh4a/clock-sh7366.c
View file @
e9bcd470
...
@@ -276,7 +276,7 @@ int __init arch_clk_init(void)
...
@@ -276,7 +276,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div6_register
(
div6_clks
,
DIV6_NR
);
ret
=
sh_clk_div6_register
(
div6_clks
,
DIV6_NR
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
MSTP_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
MSTP_NR
);
return
ret
;
return
ret
;
}
}
arch/sh/kernel/cpu/sh4a/clock-sh7722.c
View file @
e9bcd470
...
@@ -261,7 +261,7 @@ int __init arch_clk_init(void)
...
@@ -261,7 +261,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div6_register
(
div6_clks
,
DIV6_NR
);
ret
=
sh_clk_div6_register
(
div6_clks
,
DIV6_NR
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
HWBLK_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
HWBLK_NR
);
return
ret
;
return
ret
;
}
}
arch/sh/kernel/cpu/sh4a/clock-sh7723.c
View file @
e9bcd470
...
@@ -311,7 +311,7 @@ int __init arch_clk_init(void)
...
@@ -311,7 +311,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div6_register
(
div6_clks
,
DIV6_NR
);
ret
=
sh_clk_div6_register
(
div6_clks
,
DIV6_NR
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
HWBLK_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
HWBLK_NR
);
return
ret
;
return
ret
;
}
}
arch/sh/kernel/cpu/sh4a/clock-sh7724.c
View file @
e9bcd470
...
@@ -375,7 +375,7 @@ int __init arch_clk_init(void)
...
@@ -375,7 +375,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div6_reparent_register
(
div6_clks
,
DIV6_NR
);
ret
=
sh_clk_div6_reparent_register
(
div6_clks
,
DIV6_NR
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
HWBLK_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
HWBLK_NR
);
return
ret
;
return
ret
;
}
}
arch/sh/kernel/cpu/sh4a/clock-sh7734.c
View file @
e9bcd470
...
@@ -260,7 +260,7 @@ int __init arch_clk_init(void)
...
@@ -260,7 +260,7 @@ int __init arch_clk_init(void)
&
div4_table
);
&
div4_table
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
MSTP_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
MSTP_NR
);
return
ret
;
return
ret
;
}
}
arch/sh/kernel/cpu/sh4a/clock-sh7757.c
View file @
e9bcd470
...
@@ -148,7 +148,7 @@ int __init arch_clk_init(void)
...
@@ -148,7 +148,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div4_register
(
div4_clks
,
ARRAY_SIZE
(
div4_clks
),
ret
=
sh_clk_div4_register
(
div4_clks
,
ARRAY_SIZE
(
div4_clks
),
&
div4_table
);
&
div4_table
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
MSTP_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
MSTP_NR
);
return
ret
;
return
ret
;
}
}
...
...
arch/sh/kernel/cpu/sh4a/clock-sh7785.c
View file @
e9bcd470
...
@@ -175,7 +175,7 @@ int __init arch_clk_init(void)
...
@@ -175,7 +175,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div4_register
(
div4_clks
,
ARRAY_SIZE
(
div4_clks
),
ret
=
sh_clk_div4_register
(
div4_clks
,
ARRAY_SIZE
(
div4_clks
),
&
div4_table
);
&
div4_table
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
MSTP_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
MSTP_NR
);
return
ret
;
return
ret
;
}
}
arch/sh/kernel/cpu/sh4a/clock-sh7786.c
View file @
e9bcd470
...
@@ -194,7 +194,7 @@ int __init arch_clk_init(void)
...
@@ -194,7 +194,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div4_register
(
div4_clks
,
ARRAY_SIZE
(
div4_clks
),
ret
=
sh_clk_div4_register
(
div4_clks
,
ARRAY_SIZE
(
div4_clks
),
&
div4_table
);
&
div4_table
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
MSTP_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
MSTP_NR
);
return
ret
;
return
ret
;
}
}
arch/sh/kernel/cpu/sh4a/clock-shx3.c
View file @
e9bcd470
...
@@ -149,7 +149,7 @@ int __init arch_clk_init(void)
...
@@ -149,7 +149,7 @@ int __init arch_clk_init(void)
ret
=
sh_clk_div4_register
(
div4_clks
,
ARRAY_SIZE
(
div4_clks
),
ret
=
sh_clk_div4_register
(
div4_clks
,
ARRAY_SIZE
(
div4_clks
),
&
div4_table
);
&
div4_table
);
if
(
!
ret
)
if
(
!
ret
)
ret
=
sh_clk_mstp
32
_register
(
mstp_clks
,
MSTP_NR
);
ret
=
sh_clk_mstp_register
(
mstp_clks
,
MSTP_NR
);
return
ret
;
return
ret
;
}
}
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