Commit e9be4d78 authored by Jisheng Zhang's avatar Jisheng Zhang Committed by Bjorn Helgaas

PCI: dwc: designware: Test PCIE_ATU_ENABLE bit specifically

The ATU CTRL2 register is 32 bits, and bits other than the enable bit may
be set.  To check whether the ATU is enabled or not, we should test the
enable bit specifically.
Signed-off-by: default avatarJisheng Zhang <jszhang@marvell.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
Acked-by: default avatarJoao Pinto <jpinto@synopsys.com>
Acked-by: default avatarJingoo Han <jingoohan1@gmail.com>
parent 684a3a91
...@@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type, ...@@ -178,7 +178,7 @@ void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
*/ */
for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) { for (retries = 0; retries < LINK_WAIT_MAX_IATU_RETRIES; retries++) {
val = dw_pcie_readl_dbi(pci, PCIE_ATU_CR2); val = dw_pcie_readl_dbi(pci, PCIE_ATU_CR2);
if (val == PCIE_ATU_ENABLE) if (val & PCIE_ATU_ENABLE)
return; return;
usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX); usleep_range(LINK_WAIT_IATU_MIN, LINK_WAIT_IATU_MAX);
......
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