Commit eaeefba1 authored by Marcin Kościelnicki's avatar Marcin Kościelnicki Committed by Ben Skeggs

drm/nv50: Add NVA3 support in ctxprog/ctxvals generator.

Signed-off-by: default avatarMarcin Kościelnicki <koriakin@0x04.net>
Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent e60a9df3
...@@ -177,6 +177,7 @@ nv50_grctx_init(struct nouveau_grctx *ctx) ...@@ -177,6 +177,7 @@ nv50_grctx_init(struct nouveau_grctx *ctx)
case 0x96: case 0x96:
case 0x98: case 0x98:
case 0xa0: case 0xa0:
case 0xa3:
case 0xa5: case 0xa5:
case 0xa8: case 0xa8:
case 0xaa: case 0xaa:
...@@ -364,6 +365,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) ...@@ -364,6 +365,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx)
case 0xac: case 0xac:
gr_def(ctx, 0x401c00, 0x042500df); gr_def(ctx, 0x401c00, 0x042500df);
break; break;
case 0xa3:
case 0xa5: case 0xa5:
case 0xa8: case 0xa8:
gr_def(ctx, 0x401c00, 0x142500df); gr_def(ctx, 0x401c00, 0x142500df);
...@@ -418,6 +420,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) ...@@ -418,6 +420,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx)
break; break;
case 0x84: case 0x84:
case 0xa0: case 0xa0:
case 0xa3:
case 0xa5: case 0xa5:
case 0xa8: case 0xa8:
case 0xaa: case 0xaa:
...@@ -792,6 +795,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) ...@@ -792,6 +795,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx)
case 0xa5: case 0xa5:
gr_def(ctx, offset + 0x1c, 0x310c0000); gr_def(ctx, offset + 0x1c, 0x310c0000);
break; break;
case 0xa3:
case 0xa8: case 0xa8:
case 0xaa: case 0xaa:
case 0xac: case 0xac:
...@@ -859,6 +863,8 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) ...@@ -859,6 +863,8 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx)
else else
gr_def(ctx, offset + 0x8, 0x05010202); gr_def(ctx, offset + 0x8, 0x05010202);
gr_def(ctx, offset + 0xc, 0x00030201); gr_def(ctx, offset + 0xc, 0x00030201);
if (dev_priv->chipset == 0xa3)
cp_ctx(ctx, base + 0x36c, 1);
cp_ctx(ctx, base + 0x400, 2); cp_ctx(ctx, base + 0x400, 2);
gr_def(ctx, base + 0x404, 0x00000040); gr_def(ctx, base + 0x404, 0x00000040);
...@@ -1159,7 +1165,9 @@ nv50_graph_construct_xfer1(struct nouveau_grctx *ctx) ...@@ -1159,7 +1165,9 @@ nv50_graph_construct_xfer1(struct nouveau_grctx *ctx)
nv50_graph_construct_gene_unk8(ctx); nv50_graph_construct_gene_unk8(ctx);
if (dev_priv->chipset == 0xa0) if (dev_priv->chipset == 0xa0)
xf_emit(ctx, 0x189, 0); xf_emit(ctx, 0x189, 0);
else if (dev_priv->chipset < 0xa8) else if (dev_priv->chipset == 0xa3)
xf_emit(ctx, 0xd5, 0);
else if (dev_priv->chipset == 0xa5)
xf_emit(ctx, 0x99, 0); xf_emit(ctx, 0x99, 0);
else if (dev_priv->chipset == 0xaa) else if (dev_priv->chipset == 0xaa)
xf_emit(ctx, 0x65, 0); xf_emit(ctx, 0x65, 0);
...@@ -1197,6 +1205,8 @@ nv50_graph_construct_xfer1(struct nouveau_grctx *ctx) ...@@ -1197,6 +1205,8 @@ nv50_graph_construct_xfer1(struct nouveau_grctx *ctx)
ctx->ctxvals_pos = offset + 4; ctx->ctxvals_pos = offset + 4;
if (dev_priv->chipset == 0xa0) if (dev_priv->chipset == 0xa0)
xf_emit(ctx, 0xa80, 0); xf_emit(ctx, 0xa80, 0);
else if (dev_priv->chipset == 0xa3)
xf_emit(ctx, 0xa7c, 0);
else else
xf_emit(ctx, 0xa7a, 0); xf_emit(ctx, 0xa7a, 0);
xf_emit(ctx, 1, 0x3fffff); xf_emit(ctx, 1, 0x3fffff);
...@@ -1341,6 +1351,7 @@ nv50_graph_construct_gene_unk1(struct nouveau_grctx *ctx) ...@@ -1341,6 +1351,7 @@ nv50_graph_construct_gene_unk1(struct nouveau_grctx *ctx)
xf_emit(ctx, 0x942, 0); xf_emit(ctx, 0x942, 0);
break; break;
case 0xa0: case 0xa0:
case 0xa3:
xf_emit(ctx, 0x2042, 0); xf_emit(ctx, 0x2042, 0);
break; break;
case 0xa5: case 0xa5:
......
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