Commit eaf16b92 authored by Arnd Bergmann's avatar Arnd Bergmann

Merge tag 'omap-fixes-audio-clock-and-modem-signed' of...

Merge tag 'omap-fixes-audio-clock-and-modem-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Few minor fixes for omaps

Regression fixes for mcbsp audio clock, and for ams-delta modem. And two
warning fixes. These all can be merged whenever and are not urgent by any
means. Feel free to defer to the merge window unless other fixes are still
pending.

* tag 'omap-fixes-audio-clock-and-modem-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  clk: ti: Fix missing omap5 mcbsp functional clock and aliases
  clk: ti: Fix missing omap4 mcbsp functional clock and aliases
  ARM: OMAP1: ams-delta: Fix MODEM initialization failure
  ARM: OMAP: timer32K: fix all kernel-doc warnings
  ARM: omap2: fix a debug printk

Link: https://lore.kernel.org/r/pull-1697606314-911862@atomide.comSigned-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 5e8a5e89 0b9a4a67
...@@ -109,6 +109,8 @@ mcbsp1: mcbsp@0 { ...@@ -109,6 +109,8 @@ mcbsp1: mcbsp@0 {
reg = <0x0 0xff>, /* MPU private access */ reg = <0x0 0xff>, /* MPU private access */
<0x49022000 0xff>; /* L3 Interconnect */ <0x49022000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma"; reg-names = "mpu", "dma";
clocks = <&abe_clkctrl OMAP4_MCBSP1_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common"; interrupt-names = "common";
ti,buffer-size = <128>; ti,buffer-size = <128>;
...@@ -142,6 +144,8 @@ mcbsp2: mcbsp@0 { ...@@ -142,6 +144,8 @@ mcbsp2: mcbsp@0 {
reg = <0x0 0xff>, /* MPU private access */ reg = <0x0 0xff>, /* MPU private access */
<0x49024000 0xff>; /* L3 Interconnect */ <0x49024000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma"; reg-names = "mpu", "dma";
clocks = <&abe_clkctrl OMAP4_MCBSP2_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common"; interrupt-names = "common";
ti,buffer-size = <128>; ti,buffer-size = <128>;
...@@ -175,6 +179,8 @@ mcbsp3: mcbsp@0 { ...@@ -175,6 +179,8 @@ mcbsp3: mcbsp@0 {
reg = <0x0 0xff>, /* MPU private access */ reg = <0x0 0xff>, /* MPU private access */
<0x49026000 0xff>; /* L3 Interconnect */ <0x49026000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma"; reg-names = "mpu", "dma";
clocks = <&abe_clkctrl OMAP4_MCBSP3_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common"; interrupt-names = "common";
ti,buffer-size = <128>; ti,buffer-size = <128>;
......
...@@ -2043,6 +2043,8 @@ mcbsp4: mcbsp@0 { ...@@ -2043,6 +2043,8 @@ mcbsp4: mcbsp@0 {
compatible = "ti,omap4-mcbsp"; compatible = "ti,omap4-mcbsp";
reg = <0x0 0xff>; /* L4 Interconnect */ reg = <0x0 0xff>; /* L4 Interconnect */
reg-names = "mpu"; reg-names = "mpu";
clocks = <&l4_per_clkctrl OMAP4_MCBSP4_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common"; interrupt-names = "common";
ti,buffer-size = <128>; ti,buffer-size = <128>;
......
...@@ -109,6 +109,8 @@ mcbsp1: mcbsp@0 { ...@@ -109,6 +109,8 @@ mcbsp1: mcbsp@0 {
reg = <0x0 0xff>, /* MPU private access */ reg = <0x0 0xff>, /* MPU private access */
<0x49022000 0xff>; /* L3 Interconnect */ <0x49022000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma"; reg-names = "mpu", "dma";
clocks = <&abe_clkctrl OMAP5_MCBSP1_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common"; interrupt-names = "common";
ti,buffer-size = <128>; ti,buffer-size = <128>;
...@@ -142,6 +144,8 @@ mcbsp2: mcbsp@0 { ...@@ -142,6 +144,8 @@ mcbsp2: mcbsp@0 {
reg = <0x0 0xff>, /* MPU private access */ reg = <0x0 0xff>, /* MPU private access */
<0x49024000 0xff>; /* L3 Interconnect */ <0x49024000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma"; reg-names = "mpu", "dma";
clocks = <&abe_clkctrl OMAP5_MCBSP2_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common"; interrupt-names = "common";
ti,buffer-size = <128>; ti,buffer-size = <128>;
...@@ -175,6 +179,8 @@ mcbsp3: mcbsp@0 { ...@@ -175,6 +179,8 @@ mcbsp3: mcbsp@0 {
reg = <0x0 0xff>, /* MPU private access */ reg = <0x0 0xff>, /* MPU private access */
<0x49026000 0xff>; /* L3 Interconnect */ <0x49026000 0xff>; /* L3 Interconnect */
reg-names = "mpu", "dma"; reg-names = "mpu", "dma";
clocks = <&abe_clkctrl OMAP5_MCBSP3_CLKCTRL 24>;
clock-names = "fck";
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "common"; interrupt-names = "common";
ti,buffer-size = <128>; ti,buffer-size = <128>;
......
...@@ -550,6 +550,7 @@ static struct platform_device *ams_delta_devices[] __initdata = { ...@@ -550,6 +550,7 @@ static struct platform_device *ams_delta_devices[] __initdata = {
&ams_delta_nand_device, &ams_delta_nand_device,
&ams_delta_lcd_device, &ams_delta_lcd_device,
&cx20442_codec_device, &cx20442_codec_device,
&modem_nreset_device,
}; };
static struct gpiod_lookup_table *ams_delta_gpio_tables[] __initdata = { static struct gpiod_lookup_table *ams_delta_gpio_tables[] __initdata = {
...@@ -782,26 +783,28 @@ static struct plat_serial8250_port ams_delta_modem_ports[] = { ...@@ -782,26 +783,28 @@ static struct plat_serial8250_port ams_delta_modem_ports[] = {
{ }, { },
}; };
static int ams_delta_modem_pm_activate(struct device *dev)
{
modem_priv.regulator = regulator_get(dev, "RESET#");
if (IS_ERR(modem_priv.regulator))
return -EPROBE_DEFER;
return 0;
}
static struct dev_pm_domain ams_delta_modem_pm_domain = {
.activate = ams_delta_modem_pm_activate,
};
static struct platform_device ams_delta_modem_device = { static struct platform_device ams_delta_modem_device = {
.name = "serial8250", .name = "serial8250",
.id = PLAT8250_DEV_PLATFORM1, .id = PLAT8250_DEV_PLATFORM1,
.dev = { .dev = {
.platform_data = ams_delta_modem_ports, .platform_data = ams_delta_modem_ports,
.pm_domain = &ams_delta_modem_pm_domain,
}, },
}; };
static int __init modem_nreset_init(void)
{
int err;
err = platform_device_register(&modem_nreset_device);
if (err)
pr_err("Couldn't register the modem regulator device\n");
return err;
}
/* /*
* This function expects MODEM IRQ number already assigned to the port. * This function expects MODEM IRQ number already assigned to the port.
* The MODEM device requires its RESET# pin kept high during probe. * The MODEM device requires its RESET# pin kept high during probe.
...@@ -833,37 +836,6 @@ static int __init ams_delta_modem_init(void) ...@@ -833,37 +836,6 @@ static int __init ams_delta_modem_init(void)
} }
arch_initcall_sync(ams_delta_modem_init); arch_initcall_sync(ams_delta_modem_init);
static int __init late_init(void)
{
int err;
err = modem_nreset_init();
if (err)
return err;
/*
* Once the modem device is registered, the modem_nreset
* regulator can be requested on behalf of that device.
*/
modem_priv.regulator = regulator_get(&ams_delta_modem_device.dev,
"RESET#");
if (IS_ERR(modem_priv.regulator)) {
err = PTR_ERR(modem_priv.regulator);
goto unregister;
}
return 0;
unregister:
platform_device_unregister(&ams_delta_modem_device);
return err;
}
static void __init ams_delta_init_late(void)
{
omap1_init_late();
late_init();
}
static void __init ams_delta_map_io(void) static void __init ams_delta_map_io(void)
{ {
omap1_map_io(); omap1_map_io();
...@@ -877,7 +849,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)") ...@@ -877,7 +849,7 @@ MACHINE_START(AMS_DELTA, "Amstrad E3 (Delta)")
.init_early = omap1_init_early, .init_early = omap1_init_early,
.init_irq = omap1_init_irq, .init_irq = omap1_init_irq,
.init_machine = ams_delta_init, .init_machine = ams_delta_init,
.init_late = ams_delta_init_late, .init_late = omap1_init_late,
.init_time = omap1_timer_init, .init_time = omap1_timer_init,
.restart = omap1_restart, .restart = omap1_restart,
MACHINE_END MACHINE_END
...@@ -176,17 +176,18 @@ static u64 notrace omap_32k_read_sched_clock(void) ...@@ -176,17 +176,18 @@ static u64 notrace omap_32k_read_sched_clock(void)
return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0; return sync32k_cnt_reg ? readl_relaxed(sync32k_cnt_reg) : 0;
} }
static struct timespec64 persistent_ts;
static cycles_t cycles;
static unsigned int persistent_mult, persistent_shift;
/** /**
* omap_read_persistent_clock64 - Return time from a persistent clock. * omap_read_persistent_clock64 - Return time from a persistent clock.
* @ts: &struct timespec64 for the returned time
* *
* Reads the time from a source which isn't disabled during PM, the * Reads the time from a source which isn't disabled during PM, the
* 32k sync timer. Convert the cycles elapsed since last read into * 32k sync timer. Convert the cycles elapsed since last read into
* nsecs and adds to a monotonically increasing timespec64. * nsecs and adds to a monotonically increasing timespec64.
*/ */
static struct timespec64 persistent_ts;
static cycles_t cycles;
static unsigned int persistent_mult, persistent_shift;
static void omap_read_persistent_clock64(struct timespec64 *ts) static void omap_read_persistent_clock64(struct timespec64 *ts)
{ {
unsigned long long nsecs; unsigned long long nsecs;
...@@ -206,10 +207,9 @@ static void omap_read_persistent_clock64(struct timespec64 *ts) ...@@ -206,10 +207,9 @@ static void omap_read_persistent_clock64(struct timespec64 *ts)
/** /**
* omap_init_clocksource_32k - setup and register counter 32k as a * omap_init_clocksource_32k - setup and register counter 32k as a
* kernel clocksource * kernel clocksource
* @pbase: base addr of counter_32k module * @vbase: base addr of counter_32k module
* @size: size of counter_32k to map
* *
* Returns 0 upon success or negative error code upon failure. * Returns: %0 upon success or negative error code upon failure.
* *
*/ */
static int __init omap_init_clocksource_32k(void __iomem *vbase) static int __init omap_init_clocksource_32k(void __iomem *vbase)
......
...@@ -2209,7 +2209,7 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh, ...@@ -2209,7 +2209,7 @@ int omap_hwmod_parse_module_range(struct omap_hwmod *oh,
return err; return err;
pr_debug("omap_hwmod: %s %pOFn at %pR\n", pr_debug("omap_hwmod: %s %pOFn at %pR\n",
oh->name, np, &res); oh->name, np, res);
if (oh && oh->mpu_rt_idx) { if (oh && oh->mpu_rt_idx) {
omap_hwmod_fix_mpu_rt_idx(oh, np, res); omap_hwmod_fix_mpu_rt_idx(oh, np, res);
......
...@@ -749,9 +749,14 @@ static struct ti_dt_clk omap44xx_clks[] = { ...@@ -749,9 +749,14 @@ static struct ti_dt_clk omap44xx_clks[] = {
DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe-clkctrl:0028:26"), DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe-clkctrl:0028:26"),
DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe-clkctrl:0030:26"), DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe-clkctrl:0030:26"),
DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe-clkctrl:0038:26"), DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe-clkctrl:0038:26"),
DT_CLK("40122000.mcbsp", "prcm_fck", "abe-clkctrl:0028:26"),
DT_CLK("40124000.mcbsp", "prcm_fck", "abe-clkctrl:0030:26"),
DT_CLK("40126000.mcbsp", "prcm_fck", "abe-clkctrl:0038:26"),
DT_CLK(NULL, "mcbsp4_sync_mux_ck", "l4-per-clkctrl:00c0:26"), DT_CLK(NULL, "mcbsp4_sync_mux_ck", "l4-per-clkctrl:00c0:26"),
DT_CLK("48096000.mcbsp", "prcm_fck", "l4-per-clkctrl:00c0:26"),
DT_CLK(NULL, "ocp2scp_usb_phy_phy_48m", "l3-init-clkctrl:00c0:8"), DT_CLK(NULL, "ocp2scp_usb_phy_phy_48m", "l3-init-clkctrl:00c0:8"),
DT_CLK(NULL, "otg_60m_gfclk", "l3-init-clkctrl:0040:24"), DT_CLK(NULL, "otg_60m_gfclk", "l3-init-clkctrl:0040:24"),
DT_CLK(NULL, "pad_fck", "pad_clks_ck"),
DT_CLK(NULL, "per_mcbsp4_gfclk", "l4-per-clkctrl:00c0:24"), DT_CLK(NULL, "per_mcbsp4_gfclk", "l4-per-clkctrl:00c0:24"),
DT_CLK(NULL, "pmd_stm_clock_mux_ck", "emu-sys-clkctrl:0000:20"), DT_CLK(NULL, "pmd_stm_clock_mux_ck", "emu-sys-clkctrl:0000:20"),
DT_CLK(NULL, "pmd_trace_clk_mux_ck", "emu-sys-clkctrl:0000:22"), DT_CLK(NULL, "pmd_trace_clk_mux_ck", "emu-sys-clkctrl:0000:22"),
......
...@@ -565,15 +565,19 @@ static struct ti_dt_clk omap54xx_clks[] = { ...@@ -565,15 +565,19 @@ static struct ti_dt_clk omap54xx_clks[] = {
DT_CLK(NULL, "gpio8_dbclk", "l4per-clkctrl:00f8:8"), DT_CLK(NULL, "gpio8_dbclk", "l4per-clkctrl:00f8:8"),
DT_CLK(NULL, "mcbsp1_gfclk", "abe-clkctrl:0028:24"), DT_CLK(NULL, "mcbsp1_gfclk", "abe-clkctrl:0028:24"),
DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe-clkctrl:0028:26"), DT_CLK(NULL, "mcbsp1_sync_mux_ck", "abe-clkctrl:0028:26"),
DT_CLK("40122000.mcbsp", "prcm_fck", "abe-clkctrl:0028:26"),
DT_CLK(NULL, "mcbsp2_gfclk", "abe-clkctrl:0030:24"), DT_CLK(NULL, "mcbsp2_gfclk", "abe-clkctrl:0030:24"),
DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe-clkctrl:0030:26"), DT_CLK(NULL, "mcbsp2_sync_mux_ck", "abe-clkctrl:0030:26"),
DT_CLK("40124000.mcbsp", "prcm_fck", "abe-clkctrl:0030:26"),
DT_CLK(NULL, "mcbsp3_gfclk", "abe-clkctrl:0038:24"), DT_CLK(NULL, "mcbsp3_gfclk", "abe-clkctrl:0038:24"),
DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe-clkctrl:0038:26"), DT_CLK(NULL, "mcbsp3_sync_mux_ck", "abe-clkctrl:0038:26"),
DT_CLK("40126000.mcbsp", "prcm_fck", "abe-clkctrl:0038:26"),
DT_CLK(NULL, "mmc1_32khz_clk", "l3init-clkctrl:0008:8"), DT_CLK(NULL, "mmc1_32khz_clk", "l3init-clkctrl:0008:8"),
DT_CLK(NULL, "mmc1_fclk", "l3init-clkctrl:0008:25"), DT_CLK(NULL, "mmc1_fclk", "l3init-clkctrl:0008:25"),
DT_CLK(NULL, "mmc1_fclk_mux", "l3init-clkctrl:0008:24"), DT_CLK(NULL, "mmc1_fclk_mux", "l3init-clkctrl:0008:24"),
DT_CLK(NULL, "mmc2_fclk", "l3init-clkctrl:0010:25"), DT_CLK(NULL, "mmc2_fclk", "l3init-clkctrl:0010:25"),
DT_CLK(NULL, "mmc2_fclk_mux", "l3init-clkctrl:0010:24"), DT_CLK(NULL, "mmc2_fclk_mux", "l3init-clkctrl:0010:24"),
DT_CLK(NULL, "pad_fck", "pad_clks_ck"),
DT_CLK(NULL, "sata_ref_clk", "l3init-clkctrl:0068:8"), DT_CLK(NULL, "sata_ref_clk", "l3init-clkctrl:0068:8"),
DT_CLK(NULL, "timer10_gfclk_mux", "l4per-clkctrl:0008:24"), DT_CLK(NULL, "timer10_gfclk_mux", "l4per-clkctrl:0008:24"),
DT_CLK(NULL, "timer11_gfclk_mux", "l4per-clkctrl:0010:24"), DT_CLK(NULL, "timer11_gfclk_mux", "l4per-clkctrl:0010:24"),
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment