Commit eaf56410 authored by Leo Li's avatar Leo Li Committed by Alex Deucher

drm/amdgpu: Add DC feature mask to disable fractional pwm

[Why]

Some LED panel drivers might not like fractional PWM. In such cases,
backlight flickering may be observed.

[How]

Add a DC feature mask to disable fractional PWM, and associate it with
the preexisting dc_config flag.

The flag is only plumbed through the dmcu firmware, so plumb it through
the driver path as well.

To disable, add the following to the linux cmdline:
amdgpu.dcfeaturemask=0x4

Bugzilla: https://bugzilla.kernel.org/show_bug.cgi?id=204957Signed-off-by: default avatarLeo Li <sunpeng.li@amd.com>
Reviewed-by: default avatarAnthony Koo <anthony.koo@amd.com>
Tested-by: default avatarLukáš Krejčí <lskrejci@gmail.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9f0256da
...@@ -728,6 +728,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev) ...@@ -728,6 +728,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
if (amdgpu_dc_feature_mask & DC_MULTI_MON_PP_MCLK_SWITCH_MASK) if (amdgpu_dc_feature_mask & DC_MULTI_MON_PP_MCLK_SWITCH_MASK)
init_data.flags.multi_mon_pp_mclk_switch = true; init_data.flags.multi_mon_pp_mclk_switch = true;
if (amdgpu_dc_feature_mask & DC_DISABLE_FRACTIONAL_PWM_MASK)
init_data.flags.disable_fractional_pwm = true;
init_data.flags.power_down_display_on_boot = true; init_data.flags.power_down_display_on_boot = true;
#ifdef CONFIG_DRM_AMD_DC_DCN2_0 #ifdef CONFIG_DRM_AMD_DC_DCN2_0
......
...@@ -404,6 +404,10 @@ static bool dce_abm_init_backlight(struct abm *abm) ...@@ -404,6 +404,10 @@ static bool dce_abm_init_backlight(struct abm *abm)
/* Enable the backlight output */ /* Enable the backlight output */
REG_UPDATE(BL_PWM_CNTL, BL_PWM_EN, 1); REG_UPDATE(BL_PWM_CNTL, BL_PWM_EN, 1);
/* Disable fractional pwm if configured */
REG_UPDATE(BL_PWM_CNTL, BL_PWM_FRACTIONAL_EN,
abm->ctx->dc->config.disable_fractional_pwm ? 0 : 1);
/* Unlock group 2 backlight registers */ /* Unlock group 2 backlight registers */
REG_UPDATE(BL_PWM_GRP1_REG_LOCK, REG_UPDATE(BL_PWM_GRP1_REG_LOCK,
BL_PWM_GRP1_REG_LOCK, 0); BL_PWM_GRP1_REG_LOCK, 0);
......
...@@ -143,6 +143,7 @@ enum PP_FEATURE_MASK { ...@@ -143,6 +143,7 @@ enum PP_FEATURE_MASK {
enum DC_FEATURE_MASK { enum DC_FEATURE_MASK {
DC_FBC_MASK = 0x1, DC_FBC_MASK = 0x1,
DC_MULTI_MON_PP_MCLK_SWITCH_MASK = 0x2, DC_MULTI_MON_PP_MCLK_SWITCH_MASK = 0x2,
DC_DISABLE_FRACTIONAL_PWM_MASK = 0x4,
DC_PSR_MASK = 0x8, DC_PSR_MASK = 0x8,
}; };
......
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