Commit eb5a9094 authored by Srinivas Kandagatla's avatar Srinivas Kandagatla Committed by Vinod Koul

soundwire: qcom: add static port map support

SoundWire device ports are statically mapped to Controller ports during
design. Add support to read these from SoundWire devices.
This controller uses static port map info to setup bandwidth
parameters for those ports.

A generic port allocation is not possible in this cases!
Signed-off-by: default avatarSrinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: default avatarPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20210315165650.13392-4-srinivas.kandagatla@linaro.orgSigned-off-by: default avatarVinod Koul <vkoul@kernel.org>
parent 650dfdb8
...@@ -733,6 +733,8 @@ static int qcom_swrm_compute_params(struct sdw_bus *bus) ...@@ -733,6 +733,8 @@ static int qcom_swrm_compute_params(struct sdw_bus *bus)
struct sdw_slave_runtime *s_rt; struct sdw_slave_runtime *s_rt;
struct sdw_port_runtime *p_rt; struct sdw_port_runtime *p_rt;
struct qcom_swrm_port_config *pcfg; struct qcom_swrm_port_config *pcfg;
struct sdw_slave *slave;
unsigned int m_port;
int i = 0; int i = 0;
list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) { list_for_each_entry(m_rt, &bus->m_rt_list, bus_node) {
...@@ -749,8 +751,14 @@ static int qcom_swrm_compute_params(struct sdw_bus *bus) ...@@ -749,8 +751,14 @@ static int qcom_swrm_compute_params(struct sdw_bus *bus)
} }
list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
slave = s_rt->slave;
list_for_each_entry(p_rt, &s_rt->port_list, port_node) { list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
pcfg = &ctrl->pconfig[i]; m_port = slave->m_port_map[p_rt->num];
/* port config starts at offset 0 so -1 from actual port number */
if (m_port)
pcfg = &ctrl->pconfig[m_port - 1];
else
pcfg = &ctrl->pconfig[i];
p_rt->transport_params.port_num = p_rt->num; p_rt->transport_params.port_num = p_rt->num;
p_rt->transport_params.sample_interval = p_rt->transport_params.sample_interval =
pcfg->si + 1; pcfg->si + 1;
...@@ -813,8 +821,10 @@ static int qcom_swrm_stream_alloc_ports(struct qcom_swrm_ctrl *ctrl, ...@@ -813,8 +821,10 @@ static int qcom_swrm_stream_alloc_ports(struct qcom_swrm_ctrl *ctrl,
struct sdw_master_runtime *m_rt; struct sdw_master_runtime *m_rt;
struct sdw_slave_runtime *s_rt; struct sdw_slave_runtime *s_rt;
struct sdw_port_runtime *p_rt; struct sdw_port_runtime *p_rt;
struct sdw_slave *slave;
unsigned long *port_mask; unsigned long *port_mask;
int i, maxport, pn, nports = 0, ret = 0; int i, maxport, pn, nports = 0, ret = 0;
unsigned int m_port;
mutex_lock(&ctrl->port_lock); mutex_lock(&ctrl->port_lock);
list_for_each_entry(m_rt, &stream->master_list, stream_node) { list_for_each_entry(m_rt, &stream->master_list, stream_node) {
...@@ -827,9 +837,15 @@ static int qcom_swrm_stream_alloc_ports(struct qcom_swrm_ctrl *ctrl, ...@@ -827,9 +837,15 @@ static int qcom_swrm_stream_alloc_ports(struct qcom_swrm_ctrl *ctrl,
} }
list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) { list_for_each_entry(s_rt, &m_rt->slave_rt_list, m_rt_node) {
slave = s_rt->slave;
list_for_each_entry(p_rt, &s_rt->port_list, port_node) { list_for_each_entry(p_rt, &s_rt->port_list, port_node) {
m_port = slave->m_port_map[p_rt->num];
/* Port numbers start from 1 - 14*/ /* Port numbers start from 1 - 14*/
pn = find_first_zero_bit(port_mask, maxport); if (m_port)
pn = m_port;
else
pn = find_first_zero_bit(port_mask, maxport);
if (pn > maxport) { if (pn > maxport) {
dev_err(ctrl->dev, "All ports busy\n"); dev_err(ctrl->dev, "All ports busy\n");
ret = -EBUSY; ret = -EBUSY;
......
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