Commit ebc0ed71 authored by Andrew Davis's avatar Andrew Davis Committed by Nishanth Menon

arm64: dts: ti: k3-am64: Enable EPWM nodes at the board level

EPWM nodes defined in the top-level AM64x SoC dtsi files are incomplete
and will not be functional unless they are extended with pinmux
information.

As the pinmux is only known at the board integration level, these
nodes should only be enabled when provided with this information.

Disable the EPWM nodes in the dtsi files and only enable the ones that
are actually pinned out on a given board.
Signed-off-by: default avatarAndrew Davis <afd@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Reviewed-by: default avatarBryan Brattlof <bb@ti.com>
Acked-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20221017192532.23825-5-afd@ti.com
parent 79d4aa62
......@@ -898,6 +898,7 @@ epwm0: pwm@23000000 {
power-domains = <&k3_pds 86 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 0>, <&k3_clks 86 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm1: pwm@23010000 {
......@@ -907,6 +908,7 @@ epwm1: pwm@23010000 {
power-domains = <&k3_pds 87 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 1>, <&k3_clks 87 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm2: pwm@23020000 {
......@@ -916,6 +918,7 @@ epwm2: pwm@23020000 {
power-domains = <&k3_pds 88 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 2>, <&k3_clks 88 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm3: pwm@23030000 {
......@@ -925,6 +928,7 @@ epwm3: pwm@23030000 {
power-domains = <&k3_pds 89 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 3>, <&k3_clks 89 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm4: pwm@23040000 {
......@@ -934,6 +938,7 @@ epwm4: pwm@23040000 {
power-domains = <&k3_pds 90 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 4>, <&k3_clks 90 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm5: pwm@23050000 {
......@@ -943,6 +948,7 @@ epwm5: pwm@23050000 {
power-domains = <&k3_pds 91 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 5>, <&k3_clks 91 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm6: pwm@23060000 {
......@@ -952,6 +958,7 @@ epwm6: pwm@23060000 {
power-domains = <&k3_pds 92 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 6>, <&k3_clks 92 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm7: pwm@23070000 {
......@@ -961,6 +968,7 @@ epwm7: pwm@23070000 {
power-domains = <&k3_pds 93 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 7>, <&k3_clks 93 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
epwm8: pwm@23080000 {
......@@ -970,6 +978,7 @@ epwm8: pwm@23080000 {
power-domains = <&k3_pds 94 TI_SCI_PD_EXCLUSIVE>;
clocks = <&epwm_tbclk 8>, <&k3_clks 94 0>;
clock-names = "tbclk", "fck";
status = "disabled";
};
ecap0: pwm@23100000 {
......
......@@ -580,42 +580,6 @@ &ecap2 {
status = "disabled";
};
&epwm0 {
status = "disabled";
};
&epwm1 {
status = "disabled";
};
&epwm2 {
status = "disabled";
};
&epwm3 {
status = "disabled";
};
&epwm4 {
status = "disabled";
};
&epwm5 {
status = "disabled";
};
&epwm6 {
status = "disabled";
};
&epwm7 {
status = "disabled";
};
&epwm8 {
status = "disabled";
};
&icssg0_mdio {
status = "disabled";
};
......
......@@ -579,50 +579,6 @@ &ecap2 {
status = "disabled";
};
&epwm0 {
status = "disabled";
};
&epwm1 {
status = "disabled";
};
&epwm2 {
status = "disabled";
};
&epwm3 {
status = "disabled";
};
&epwm4 {
/*
* EPWM4_A, EPWM4_B is available on Pin 32 and 33 on J4 (RPi hat)
* But RPi Hat will be used for other use cases, so marking epwm4 as disabled.
*/
status = "disabled";
};
&epwm5 {
/*
* EPWM5_A, EPWM5_B is available on Pin 29 and 31 on J4 (RPi hat)
* But RPi Hat will be used for other use cases, so marking epwm5 as disabled.
*/
status = "disabled";
};
&epwm6 {
status = "disabled";
};
&epwm7 {
status = "disabled";
};
&epwm8 {
status = "disabled";
};
&icssg0_mdio {
status = "disabled";
};
......
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