Commit ec86e545 authored by Paul Burton's avatar Paul Burton

Merge tag 'mips_fixes_5.1_1' into mips-next

A small batch of MIPS fixes for 5.1:

- An interrupt masking fix for Loongson-based Lemote 2F systems (fixing
  a regression from v3.19).

- A relocation fix for configurations in which the devicetree is stored
  in an ELF section (fixing a regression from v4.7).

- Fix jump labels for MIPSr6 kernels where they previously could
  inadvertently place a control transfer instruction in a forbidden slot
  & take unexpected exceptions (fixing MIPSr6 support added in v4.0).

- Extend an existing USB power workaround for the Netgear WNDR3400 to v2
  boards in addition to the v3 ones that already used it.

- Remove the custom MIPS32 definition of __kernel_fsid_t to make it
  consistent with MIPS64 & every other architecture, in particular
  resolving issues for code which tries to print the val field whose
  type previously differed (though had identical memory layout).

Merged into mips-next to gain the MIPSr6 jump label fix before enabling
jump labels by default for generic kernel builds.
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
parents e6046b5e f6cab793
......@@ -24,6 +24,7 @@ void __init bcm47xx_workarounds(void)
case BCM47XX_BOARD_NETGEAR_WNR3500L:
bcm47xx_workarounds_enable_usb_power(12);
break;
case BCM47XX_BOARD_NETGEAR_WNDR3400V2:
case BCM47XX_BOARD_NETGEAR_WNDR3400_V3:
bcm47xx_workarounds_enable_usb_power(21);
break;
......
......@@ -21,15 +21,15 @@
#endif
#ifdef CONFIG_CPU_MICROMIPS
#define NOP_INSN "nop32"
#define B_INSN "b32"
#else
#define NOP_INSN "nop"
#define B_INSN "b"
#endif
static __always_inline bool arch_static_branch(struct static_key *key, bool branch)
{
asm_volatile_goto("1:\t" NOP_INSN "\n\t"
"nop\n\t"
asm_volatile_goto("1:\t" B_INSN " 2f\n\t"
"2:\tnop\n\t"
".pushsection __jump_table, \"aw\"\n\t"
WORD_INSN " 1b, %l[l_yes], %0\n\t"
".popsection\n\t"
......
......@@ -21,13 +21,6 @@
typedef long __kernel_daddr_t;
#define __kernel_daddr_t __kernel_daddr_t
#if (_MIPS_SZLONG == 32)
typedef struct {
long val[2];
} __kernel_fsid_t;
#define __kernel_fsid_t __kernel_fsid_t
#endif
#include <asm-generic/posix_types.h>
#endif /* _ASM_POSIX_TYPES_H */
......@@ -140,6 +140,13 @@ SECTIONS
PERCPU_SECTION(1 << CONFIG_MIPS_L1_CACHE_SHIFT)
#endif
#ifdef CONFIG_MIPS_ELF_APPENDED_DTB
.appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
*(.appended_dtb)
KEEP(*(.appended_dtb))
}
#endif
#ifdef CONFIG_RELOCATABLE
. = ALIGN(4);
......@@ -164,11 +171,6 @@ SECTIONS
__appended_dtb = .;
/* leave space for appended DTB */
. += 0x100000;
#elif defined(CONFIG_MIPS_ELF_APPENDED_DTB)
.appended_dtb : AT(ADDR(.appended_dtb) - LOAD_OFFSET) {
*(.appended_dtb)
KEEP(*(.appended_dtb))
}
#endif
/*
* Align to 64K in attempt to eliminate holes before the
......
......@@ -103,7 +103,7 @@ static struct irqaction ip6_irqaction = {
static struct irqaction cascade_irqaction = {
.handler = no_action,
.name = "cascade",
.flags = IRQF_NO_THREAD,
.flags = IRQF_NO_THREAD | IRQF_NO_SUSPEND,
};
void __init mach_init_irq(void)
......
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