Commit ee3942d9 authored by David (Ming Qiang) Wu's avatar David (Ming Qiang) Wu Committed by Alex Deucher

drm/amdgpu: drop some kernel messages in VCN code

Similar to commit 813e7d4c where some kernel log
messages are dropped. With this commit, more log
messages in older version of VCN/JPEG code are dropped.
Acked-by: default avatarLeo Liu <leo.liu@amd.com>
Signed-off-by: default avatarDavid (Ming Qiang) Wu <David.Wu3@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 778e3979
...@@ -581,7 +581,6 @@ static const struct amdgpu_ring_funcs jpeg_v1_0_decode_ring_vm_funcs = { ...@@ -581,7 +581,6 @@ static const struct amdgpu_ring_funcs jpeg_v1_0_decode_ring_vm_funcs = {
static void jpeg_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev) static void jpeg_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev)
{ {
adev->jpeg.inst->ring_dec->funcs = &jpeg_v1_0_decode_ring_vm_funcs; adev->jpeg.inst->ring_dec->funcs = &jpeg_v1_0_decode_ring_vm_funcs;
DRM_INFO("JPEG decode is enabled in VM mode\n");
} }
static const struct amdgpu_irq_src_funcs jpeg_v1_0_irq_funcs = { static const struct amdgpu_irq_src_funcs jpeg_v1_0_irq_funcs = {
......
...@@ -131,16 +131,11 @@ static int jpeg_v2_0_hw_init(void *handle) ...@@ -131,16 +131,11 @@ static int jpeg_v2_0_hw_init(void *handle)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec; struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
int r;
adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
(adev->doorbell_index.vcn.vcn_ring0_1 << 1), 0); (adev->doorbell_index.vcn.vcn_ring0_1 << 1), 0);
r = amdgpu_ring_test_helper(ring); return amdgpu_ring_test_helper(ring);
if (!r)
DRM_INFO("JPEG decode initialized successfully.\n");
return r;
} }
/** /**
...@@ -795,7 +790,6 @@ static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = { ...@@ -795,7 +790,6 @@ static const struct amdgpu_ring_funcs jpeg_v2_0_dec_ring_vm_funcs = {
static void jpeg_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev) static void jpeg_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev)
{ {
adev->jpeg.inst->ring_dec->funcs = &jpeg_v2_0_dec_ring_vm_funcs; adev->jpeg.inst->ring_dec->funcs = &jpeg_v2_0_dec_ring_vm_funcs;
DRM_INFO("JPEG decode is enabled in VM mode\n");
} }
static const struct amdgpu_irq_src_funcs jpeg_v2_0_irq_funcs = { static const struct amdgpu_irq_src_funcs jpeg_v2_0_irq_funcs = {
......
...@@ -196,8 +196,6 @@ static int jpeg_v2_5_hw_init(void *handle) ...@@ -196,8 +196,6 @@ static int jpeg_v2_5_hw_init(void *handle)
return r; return r;
} }
DRM_INFO("JPEG decode initialized successfully.\n");
return 0; return 0;
} }
...@@ -728,7 +726,6 @@ static void jpeg_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev) ...@@ -728,7 +726,6 @@ static void jpeg_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev)
else /* CHIP_ALDEBARAN */ else /* CHIP_ALDEBARAN */
adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v2_6_dec_ring_vm_funcs; adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v2_6_dec_ring_vm_funcs;
adev->jpeg.inst[i].ring_dec->me = i; adev->jpeg.inst[i].ring_dec->me = i;
DRM_INFO("JPEG(%d) JPEG decode is enabled in VM mode\n", i);
} }
} }
......
...@@ -146,18 +146,11 @@ static int jpeg_v3_0_hw_init(void *handle) ...@@ -146,18 +146,11 @@ static int jpeg_v3_0_hw_init(void *handle)
{ {
struct amdgpu_device *adev = (struct amdgpu_device *)handle; struct amdgpu_device *adev = (struct amdgpu_device *)handle;
struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec; struct amdgpu_ring *ring = adev->jpeg.inst->ring_dec;
int r;
adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell, adev->nbio.funcs->vcn_doorbell_range(adev, ring->use_doorbell,
(adev->doorbell_index.vcn.vcn_ring0_1 << 1), 0); (adev->doorbell_index.vcn.vcn_ring0_1 << 1), 0);
r = amdgpu_ring_test_helper(ring); return amdgpu_ring_test_helper(ring);
if (r)
return r;
DRM_INFO("JPEG decode initialized successfully.\n");
return 0;
} }
/** /**
...@@ -593,7 +586,6 @@ static const struct amdgpu_ring_funcs jpeg_v3_0_dec_ring_vm_funcs = { ...@@ -593,7 +586,6 @@ static const struct amdgpu_ring_funcs jpeg_v3_0_dec_ring_vm_funcs = {
static void jpeg_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev) static void jpeg_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev)
{ {
adev->jpeg.inst->ring_dec->funcs = &jpeg_v3_0_dec_ring_vm_funcs; adev->jpeg.inst->ring_dec->funcs = &jpeg_v3_0_dec_ring_vm_funcs;
DRM_INFO("JPEG decode is enabled in VM mode\n");
} }
static const struct amdgpu_irq_src_funcs jpeg_v3_0_irq_funcs = { static const struct amdgpu_irq_src_funcs jpeg_v3_0_irq_funcs = {
......
...@@ -181,8 +181,6 @@ static int jpeg_v4_0_hw_init(void *handle) ...@@ -181,8 +181,6 @@ static int jpeg_v4_0_hw_init(void *handle)
return r; return r;
} }
DRM_DEV_INFO(adev->dev, "JPEG decode initialized successfully.\n");
return 0; return 0;
} }
...@@ -755,7 +753,6 @@ static const struct amdgpu_ring_funcs jpeg_v4_0_dec_ring_vm_funcs = { ...@@ -755,7 +753,6 @@ static const struct amdgpu_ring_funcs jpeg_v4_0_dec_ring_vm_funcs = {
static void jpeg_v4_0_set_dec_ring_funcs(struct amdgpu_device *adev) static void jpeg_v4_0_set_dec_ring_funcs(struct amdgpu_device *adev)
{ {
adev->jpeg.inst->ring_dec->funcs = &jpeg_v4_0_dec_ring_vm_funcs; adev->jpeg.inst->ring_dec->funcs = &jpeg_v4_0_dec_ring_vm_funcs;
DRM_DEV_INFO(adev->dev, "JPEG decode is enabled in VM mode\n");
} }
static const struct amdgpu_irq_src_funcs jpeg_v4_0_irq_funcs = { static const struct amdgpu_irq_src_funcs jpeg_v4_0_irq_funcs = {
......
...@@ -341,7 +341,6 @@ static int jpeg_v4_0_3_hw_init(void *handle) ...@@ -341,7 +341,6 @@ static int jpeg_v4_0_3_hw_init(void *handle)
} }
} }
} }
DRM_DEV_INFO(adev->dev, "JPEG decode initialized successfully.\n");
return 0; return 0;
} }
...@@ -1100,7 +1099,6 @@ static void jpeg_v4_0_3_set_dec_ring_funcs(struct amdgpu_device *adev) ...@@ -1100,7 +1099,6 @@ static void jpeg_v4_0_3_set_dec_ring_funcs(struct amdgpu_device *adev)
adev->jpeg.inst[i].aid_id = adev->jpeg.inst[i].aid_id =
jpeg_inst / adev->jpeg.num_inst_per_aid; jpeg_inst / adev->jpeg.num_inst_per_aid;
} }
DRM_DEV_INFO(adev->dev, "JPEG decode is enabled in VM mode\n");
} }
static const struct amdgpu_irq_src_funcs jpeg_v4_0_3_irq_funcs = { static const struct amdgpu_irq_src_funcs jpeg_v4_0_3_irq_funcs = {
......
...@@ -191,7 +191,6 @@ static int jpeg_v4_0_5_hw_init(void *handle) ...@@ -191,7 +191,6 @@ static int jpeg_v4_0_5_hw_init(void *handle)
// TODO: Enable ring test with DPG support // TODO: Enable ring test with DPG support
if (adev->pg_flags & AMD_PG_SUPPORT_JPEG_DPG) { if (adev->pg_flags & AMD_PG_SUPPORT_JPEG_DPG) {
DRM_DEV_INFO(adev->dev, "JPEG decode initialized successfully under DPG Mode");
return 0; return 0;
} }
...@@ -205,9 +204,6 @@ static int jpeg_v4_0_5_hw_init(void *handle) ...@@ -205,9 +204,6 @@ static int jpeg_v4_0_5_hw_init(void *handle)
return r; return r;
} }
if (!r)
DRM_INFO("JPEG decode initialized successfully under SPG Mode\n");
return 0; return 0;
} }
...@@ -805,7 +801,6 @@ static void jpeg_v4_0_5_set_dec_ring_funcs(struct amdgpu_device *adev) ...@@ -805,7 +801,6 @@ static void jpeg_v4_0_5_set_dec_ring_funcs(struct amdgpu_device *adev)
adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v4_0_5_dec_ring_vm_funcs; adev->jpeg.inst[i].ring_dec->funcs = &jpeg_v4_0_5_dec_ring_vm_funcs;
adev->jpeg.inst[i].ring_dec->me = i; adev->jpeg.inst[i].ring_dec->me = i;
DRM_DEV_INFO(adev->dev, "JPEG%d decode is enabled in VM mode\n", i);
} }
} }
......
...@@ -202,24 +202,17 @@ static int vcn_v1_0_hw_init(void *handle) ...@@ -202,24 +202,17 @@ static int vcn_v1_0_hw_init(void *handle)
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
for (i = 0; i < adev->vcn.num_enc_rings; ++i) { for (i = 0; i < adev->vcn.num_enc_rings; ++i) {
ring = &adev->vcn.inst->ring_enc[i]; ring = &adev->vcn.inst->ring_enc[i];
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
} }
ring = adev->jpeg.inst->ring_dec; ring = adev->jpeg.inst->ring_dec;
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r)
goto done;
done:
if (!r)
DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r; return r;
} }
...@@ -2043,7 +2036,6 @@ static const struct amdgpu_ring_funcs vcn_v1_0_enc_ring_vm_funcs = { ...@@ -2043,7 +2036,6 @@ static const struct amdgpu_ring_funcs vcn_v1_0_enc_ring_vm_funcs = {
static void vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev) static void vcn_v1_0_set_dec_ring_funcs(struct amdgpu_device *adev)
{ {
adev->vcn.inst->ring_dec.funcs = &vcn_v1_0_dec_ring_vm_funcs; adev->vcn.inst->ring_dec.funcs = &vcn_v1_0_dec_ring_vm_funcs;
DRM_INFO("VCN decode is enabled in VM mode\n");
} }
static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev) static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev)
...@@ -2052,8 +2044,6 @@ static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev) ...@@ -2052,8 +2044,6 @@ static void vcn_v1_0_set_enc_ring_funcs(struct amdgpu_device *adev)
for (i = 0; i < adev->vcn.num_enc_rings; ++i) for (i = 0; i < adev->vcn.num_enc_rings; ++i)
adev->vcn.inst->ring_enc[i].funcs = &vcn_v1_0_enc_ring_vm_funcs; adev->vcn.inst->ring_enc[i].funcs = &vcn_v1_0_enc_ring_vm_funcs;
DRM_INFO("VCN encode is enabled in VM mode\n");
} }
static const struct amdgpu_irq_src_funcs vcn_v1_0_irq_funcs = { static const struct amdgpu_irq_src_funcs vcn_v1_0_irq_funcs = {
......
...@@ -237,7 +237,7 @@ static int vcn_v2_0_hw_init(void *handle) ...@@ -237,7 +237,7 @@ static int vcn_v2_0_hw_init(void *handle)
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
//Disable vcn decode for sriov //Disable vcn decode for sriov
if (amdgpu_sriov_vf(adev)) if (amdgpu_sriov_vf(adev))
...@@ -247,15 +247,10 @@ static int vcn_v2_0_hw_init(void *handle) ...@@ -247,15 +247,10 @@ static int vcn_v2_0_hw_init(void *handle)
ring = &adev->vcn.inst->ring_enc[i]; ring = &adev->vcn.inst->ring_enc[i];
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
} }
done: return 0;
if (!r)
DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r;
} }
/** /**
...@@ -2074,7 +2069,6 @@ static const struct amdgpu_ring_funcs vcn_v2_0_enc_ring_vm_funcs = { ...@@ -2074,7 +2069,6 @@ static const struct amdgpu_ring_funcs vcn_v2_0_enc_ring_vm_funcs = {
static void vcn_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev) static void vcn_v2_0_set_dec_ring_funcs(struct amdgpu_device *adev)
{ {
adev->vcn.inst->ring_dec.funcs = &vcn_v2_0_dec_ring_vm_funcs; adev->vcn.inst->ring_dec.funcs = &vcn_v2_0_dec_ring_vm_funcs;
DRM_INFO("VCN decode is enabled in VM mode\n");
} }
static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev) static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev)
...@@ -2083,8 +2077,6 @@ static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev) ...@@ -2083,8 +2077,6 @@ static void vcn_v2_0_set_enc_ring_funcs(struct amdgpu_device *adev)
for (i = 0; i < adev->vcn.num_enc_rings; ++i) for (i = 0; i < adev->vcn.num_enc_rings; ++i)
adev->vcn.inst->ring_enc[i].funcs = &vcn_v2_0_enc_ring_vm_funcs; adev->vcn.inst->ring_enc[i].funcs = &vcn_v2_0_enc_ring_vm_funcs;
DRM_INFO("VCN encode is enabled in VM mode\n");
} }
static const struct amdgpu_irq_src_funcs vcn_v2_0_irq_funcs = { static const struct amdgpu_irq_src_funcs vcn_v2_0_irq_funcs = {
......
...@@ -314,22 +314,17 @@ static int vcn_v2_5_hw_init(void *handle) ...@@ -314,22 +314,17 @@ static int vcn_v2_5_hw_init(void *handle)
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
for (i = 0; i < adev->vcn.num_enc_rings; ++i) { for (i = 0; i < adev->vcn.num_enc_rings; ++i) {
ring = &adev->vcn.inst[j].ring_enc[i]; ring = &adev->vcn.inst[j].ring_enc[i];
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
} }
} }
} }
done:
if (!r)
DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r; return r;
} }
...@@ -1710,7 +1705,6 @@ static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev) ...@@ -1710,7 +1705,6 @@ static void vcn_v2_5_set_dec_ring_funcs(struct amdgpu_device *adev)
continue; continue;
adev->vcn.inst[i].ring_dec.funcs = &vcn_v2_5_dec_ring_vm_funcs; adev->vcn.inst[i].ring_dec.funcs = &vcn_v2_5_dec_ring_vm_funcs;
adev->vcn.inst[i].ring_dec.me = i; adev->vcn.inst[i].ring_dec.me = i;
DRM_INFO("VCN(%d) decode is enabled in VM mode\n", i);
} }
} }
...@@ -1725,7 +1719,6 @@ static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev) ...@@ -1725,7 +1719,6 @@ static void vcn_v2_5_set_enc_ring_funcs(struct amdgpu_device *adev)
adev->vcn.inst[j].ring_enc[i].funcs = &vcn_v2_5_enc_ring_vm_funcs; adev->vcn.inst[j].ring_enc[i].funcs = &vcn_v2_5_enc_ring_vm_funcs;
adev->vcn.inst[j].ring_enc[i].me = j; adev->vcn.inst[j].ring_enc[i].me = j;
} }
DRM_INFO("VCN(%d) encode is enabled in VM mode\n", j);
} }
} }
......
...@@ -303,7 +303,7 @@ static int vcn_v3_0_hw_init(void *handle) ...@@ -303,7 +303,7 @@ static int vcn_v3_0_hw_init(void *handle)
if (amdgpu_sriov_vf(adev)) { if (amdgpu_sriov_vf(adev)) {
r = vcn_v3_0_start_sriov(adev); r = vcn_v3_0_start_sriov(adev);
if (r) if (r)
goto done; return r;
/* initialize VCN dec and enc ring buffers */ /* initialize VCN dec and enc ring buffers */
for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
...@@ -348,24 +348,18 @@ static int vcn_v3_0_hw_init(void *handle) ...@@ -348,24 +348,18 @@ static int vcn_v3_0_hw_init(void *handle)
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
for (j = 0; j < adev->vcn.num_enc_rings; ++j) { for (j = 0; j < adev->vcn.num_enc_rings; ++j) {
ring = &adev->vcn.inst[i].ring_enc[j]; ring = &adev->vcn.inst[i].ring_enc[j];
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
} }
} }
} }
return 0; return 0;
done:
if (!r)
DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r;
} }
/** /**
...@@ -2041,8 +2035,6 @@ static void vcn_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev) ...@@ -2041,8 +2035,6 @@ static void vcn_v3_0_set_dec_ring_funcs(struct amdgpu_device *adev)
else else
adev->vcn.inst[i].ring_dec.funcs = &vcn_v3_0_dec_sw_ring_vm_funcs; adev->vcn.inst[i].ring_dec.funcs = &vcn_v3_0_dec_sw_ring_vm_funcs;
adev->vcn.inst[i].ring_dec.me = i; adev->vcn.inst[i].ring_dec.me = i;
DRM_INFO("VCN(%d) decode%s is enabled in VM mode\n", i,
DEC_SW_RING_ENABLED?"(Software Ring)":"");
} }
} }
...@@ -2058,8 +2050,6 @@ static void vcn_v3_0_set_enc_ring_funcs(struct amdgpu_device *adev) ...@@ -2058,8 +2050,6 @@ static void vcn_v3_0_set_enc_ring_funcs(struct amdgpu_device *adev)
adev->vcn.inst[i].ring_enc[j].funcs = &vcn_v3_0_enc_ring_vm_funcs; adev->vcn.inst[i].ring_enc[j].funcs = &vcn_v3_0_enc_ring_vm_funcs;
adev->vcn.inst[i].ring_enc[j].me = i; adev->vcn.inst[i].ring_enc[j].me = i;
} }
if (adev->vcn.num_enc_rings > 0)
DRM_INFO("VCN(%d) encode is enabled in VM mode\n", i);
} }
} }
......
...@@ -258,7 +258,7 @@ static int vcn_v4_0_hw_init(void *handle) ...@@ -258,7 +258,7 @@ static int vcn_v4_0_hw_init(void *handle)
if (amdgpu_sriov_vf(adev)) { if (amdgpu_sriov_vf(adev)) {
r = vcn_v4_0_start_sriov(adev); r = vcn_v4_0_start_sriov(adev);
if (r) if (r)
goto done; return r;
for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
if (adev->vcn.harvest_config & (1 << i)) if (adev->vcn.harvest_config & (1 << i))
...@@ -269,7 +269,6 @@ static int vcn_v4_0_hw_init(void *handle) ...@@ -269,7 +269,6 @@ static int vcn_v4_0_hw_init(void *handle)
ring->wptr_old = 0; ring->wptr_old = 0;
vcn_v4_0_unified_ring_set_wptr(ring); vcn_v4_0_unified_ring_set_wptr(ring);
ring->sched.ready = true; ring->sched.ready = true;
} }
} else { } else {
for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
...@@ -283,18 +282,11 @@ static int vcn_v4_0_hw_init(void *handle) ...@@ -283,18 +282,11 @@ static int vcn_v4_0_hw_init(void *handle)
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
} }
} }
return 0; return 0;
done:
if (!r)
DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r;
} }
/** /**
...@@ -1900,8 +1892,6 @@ static void vcn_v4_0_set_unified_ring_funcs(struct amdgpu_device *adev) ...@@ -1900,8 +1892,6 @@ static void vcn_v4_0_set_unified_ring_funcs(struct amdgpu_device *adev)
adev->vcn.inst[i].ring_enc[0].funcs = adev->vcn.inst[i].ring_enc[0].funcs =
(const struct amdgpu_ring_funcs *)&vcn_v4_0_unified_ring_vm_funcs; (const struct amdgpu_ring_funcs *)&vcn_v4_0_unified_ring_vm_funcs;
adev->vcn.inst[i].ring_enc[0].me = i; adev->vcn.inst[i].ring_enc[0].me = i;
DRM_INFO("VCN(%d) encode/decode are enabled in VM mode\n", i);
} }
} }
......
...@@ -210,7 +210,7 @@ static int vcn_v4_0_3_hw_init(void *handle) ...@@ -210,7 +210,7 @@ static int vcn_v4_0_3_hw_init(void *handle)
if (amdgpu_sriov_vf(adev)) { if (amdgpu_sriov_vf(adev)) {
r = vcn_v4_0_3_start_sriov(adev); r = vcn_v4_0_3_start_sriov(adev);
if (r) if (r)
goto done; return r;
for (i = 0; i < adev->vcn.num_vcn_inst; ++i) { for (i = 0; i < adev->vcn.num_vcn_inst; ++i) {
ring = &adev->vcn.inst[i].ring_enc[0]; ring = &adev->vcn.inst[i].ring_enc[0];
...@@ -246,15 +246,10 @@ static int vcn_v4_0_3_hw_init(void *handle) ...@@ -246,15 +246,10 @@ static int vcn_v4_0_3_hw_init(void *handle)
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
} }
} }
done:
if (!r)
DRM_DEV_INFO(adev->dev, "VCN decode initialized successfully(under %s).\n",
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r; return r;
} }
...@@ -1450,7 +1445,6 @@ static void vcn_v4_0_3_set_unified_ring_funcs(struct amdgpu_device *adev) ...@@ -1450,7 +1445,6 @@ static void vcn_v4_0_3_set_unified_ring_funcs(struct amdgpu_device *adev)
adev->vcn.inst[i].aid_id = adev->vcn.inst[i].aid_id =
vcn_inst / adev->vcn.num_inst_per_aid; vcn_inst / adev->vcn.num_inst_per_aid;
} }
DRM_DEV_INFO(adev->dev, "VCN decode is enabled in VM mode\n");
} }
/** /**
......
...@@ -234,16 +234,10 @@ static int vcn_v4_0_5_hw_init(void *handle) ...@@ -234,16 +234,10 @@ static int vcn_v4_0_5_hw_init(void *handle)
r = amdgpu_ring_test_helper(ring); r = amdgpu_ring_test_helper(ring);
if (r) if (r)
goto done; return r;
} }
return 0; return 0;
done:
if (!r)
DRM_INFO("VCN decode and encode initialized successfully(under %s).\n",
(adev->pg_flags & AMD_PG_SUPPORT_VCN_DPG)?"DPG Mode":"SPG Mode");
return r;
} }
/** /**
...@@ -1558,8 +1552,6 @@ static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev) ...@@ -1558,8 +1552,6 @@ static void vcn_v4_0_5_set_unified_ring_funcs(struct amdgpu_device *adev)
adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_5_unified_ring_vm_funcs; adev->vcn.inst[i].ring_enc[0].funcs = &vcn_v4_0_5_unified_ring_vm_funcs;
adev->vcn.inst[i].ring_enc[0].me = i; adev->vcn.inst[i].ring_enc[0].me = i;
DRM_INFO("VCN(%d) encode/decode are enabled in VM mode\n", i);
} }
} }
......
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