drm/nouveau/nvenc: switch to instanced constructor

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Reviewed-by: Lyude Paul <lyude@redhat.com>

drivers/gpu/drm/nouveau/include/nvkm/core/device.h

@@ -60,7 +60,6 @@ struct nvkm_device {
 		struct notifier_block nb;
 	} acpi;
 
-	struct nvkm_nvenc *nvenc[3];
 	struct nvkm_pm *pm;
 	struct nvkm_engine *sec;
 	struct nvkm_sec2 *sec2;
@@ -107,7 +106,6 @@ struct nvkm_device_chip {
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
 
-	int (*nvenc[3])(struct nvkm_device *, int idx, struct nvkm_nvenc **);
 	int (*pm      )(struct nvkm_device *, int idx, struct nvkm_pm **);
 	int (*sec     )(struct nvkm_device *, int idx, struct nvkm_engine **);
 	int (*sec2    )(struct nvkm_device *, int idx, struct nvkm_sec2 **);

drivers/gpu/drm/nouveau/include/nvkm/core/layout.h

@@ -40,4 +40,5 @@ NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSPDEC  , struct nvkm_engine  ,   mspdec)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSPPP   , struct nvkm_engine  ,    msppp)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_MSVLD   , struct nvkm_engine  ,    msvld)
 NVKM_LAYOUT_INST(NVKM_ENGINE_NVDEC   , struct nvkm_nvdec   ,    nvdec, 3)
+NVKM_LAYOUT_INST(NVKM_ENGINE_NVENC   , struct nvkm_nvenc   ,    nvenc, 3)
 NVKM_LAYOUT_ONCE(NVKM_ENGINE_VP      , struct nvkm_engine  ,       vp)

drivers/gpu/drm/nouveau/include/nvkm/engine/nvenc.h

@@ -11,5 +11,5 @@ struct nvkm_nvenc {
 	struct nvkm_falcon falcon;
 };
 
-int gm107_nvenc_new(struct nvkm_device *, int, struct nvkm_nvenc **);
+int gm107_nvenc_new(struct nvkm_device *, enum nvkm_subdev_type, int inst, struct nvkm_nvenc **);
 #endif

drivers/gpu/drm/nouveau/nvkm/core/subdev.c

@@ -33,9 +33,6 @@ nvkm_subdev_type[NVKM_SUBDEV_NR] = {
 #include <core/layout.h>
 #undef NVKM_LAYOUT_ONCE
 #undef NVKM_LAYOUT_INST
-	[NVKM_ENGINE_NVENC0  ] = "nvenc0",
-	[NVKM_ENGINE_NVENC1  ] = "nvenc1",
-	[NVKM_ENGINE_NVENC2  ] = "nvenc2",
 	[NVKM_ENGINE_PM      ] = "pm",
 	[NVKM_ENGINE_SEC     ] = "sec",
 	[NVKM_ENGINE_SEC2    ] = "sec2",
@@ -185,18 +182,6 @@ nvkm_subdev_ctor_(const struct nvkm_subdev_func *func, bool old,
 	subdev->inst = inst < 0 ? 0 : inst;
 	subdev->index = type + subdev->inst;
 
-	if (old) {
-		switch (subdev->type) {
-		case NVKM_ENGINE_NVENC0 ... NVKM_ENGINE_NVENC_LAST:
-			subdev->type = NVKM_ENGINE_NVENC;
-			subdev->inst = subdev->index - NVKM_ENGINE_NVENC0;
-			break;
-		default:
-			break;
-		}
-		inst = -1;
-	}
-
 	if (inst >= 0)
 		snprintf(subdev->name, sizeof(subdev->name), "%s%d", nvkm_subdev_type[type], inst);
 	else

drivers/gpu/drm/nouveau/nvkm/engine/device/base.c

@@ -1969,7 +1969,7 @@ nv117_chipset = {
 	.fifo     = { 0x00000001, gm107_fifo_new },
 	.gr       = { 0x00000001, gm107_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
+	.nvenc    = { 0x00000001, gm107_nvenc_new },
 	.sw = gf100_sw_new,
 };
 
@@ -2037,8 +2037,7 @@ nv120_chipset = {
 	.fifo     = { 0x00000001, gm200_fifo_new },
 	.gr       = { 0x00000001, gm200_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
-	.nvenc[1] = gm107_nvenc_new,
+	.nvenc    = { 0x00000003, gm107_nvenc_new },
 	.sw = gf100_sw_new,
 };
 
@@ -2073,8 +2072,7 @@ nv124_chipset = {
 	.fifo     = { 0x00000001, gm200_fifo_new },
 	.gr       = { 0x00000001, gm200_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
-	.nvenc[1] = gm107_nvenc_new,
+	.nvenc    = { 0x00000003, gm107_nvenc_new },
 	.sw = gf100_sw_new,
 };
 
@@ -2109,7 +2107,7 @@ nv126_chipset = {
 	.fifo     = { 0x00000001, gm200_fifo_new },
 	.gr       = { 0x00000001, gm200_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
+	.nvenc    = { 0x00000001, gm107_nvenc_new },
 	.sw = gf100_sw_new,
 };
 
@@ -2167,9 +2165,7 @@ nv130_chipset = {
 	.fifo     = { 0x00000001, gp100_fifo_new },
 	.gr       = { 0x00000001, gp100_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
-	.nvenc[1] = gm107_nvenc_new,
-	.nvenc[2] = gm107_nvenc_new,
+	.nvenc    = { 0x00000007, gm107_nvenc_new },
 	.sw = gf100_sw_new,
 };
 
@@ -2202,8 +2198,7 @@ nv132_chipset = {
 	.fifo     = { 0x00000001, gp100_fifo_new },
 	.gr       = { 0x00000001, gp102_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
-	.nvenc[1] = gm107_nvenc_new,
+	.nvenc    = { 0x00000003, gm107_nvenc_new },
 	.sec2 = gp102_sec2_new,
 	.sw = gf100_sw_new,
 };
@@ -2237,8 +2232,7 @@ nv134_chipset = {
 	.fifo     = { 0x00000001, gp100_fifo_new },
 	.gr       = { 0x00000001, gp104_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
-	.nvenc[1] = gm107_nvenc_new,
+	.nvenc    = { 0x00000003, gm107_nvenc_new },
 	.sec2 = gp102_sec2_new,
 	.sw = gf100_sw_new,
 };
@@ -2272,7 +2266,7 @@ nv136_chipset = {
 	.fifo     = { 0x00000001, gp100_fifo_new },
 	.gr       = { 0x00000001, gp104_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
+	.nvenc    = { 0x00000001, gm107_nvenc_new },
 	.sec2 = gp102_sec2_new,
 	.sw = gf100_sw_new,
 };
@@ -2306,8 +2300,7 @@ nv137_chipset = {
 	.fifo     = { 0x00000001, gp100_fifo_new },
 	.gr       = { 0x00000001, gp107_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
-	.nvenc[1] = gm107_nvenc_new,
+	.nvenc    = { 0x00000003, gm107_nvenc_new },
 	.sec2 = gp102_sec2_new,
 	.sw = gf100_sw_new,
 };
@@ -2399,9 +2392,7 @@ nv140_chipset = {
 	.fifo     = { 0x00000001, gv100_fifo_new },
 	.gr       = { 0x00000001, gv100_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
-	.nvenc[1] = gm107_nvenc_new,
-	.nvenc[2] = gm107_nvenc_new,
+	.nvenc    = { 0x00000007, gm107_nvenc_new },
 	.sec2 = gp108_sec2_new,
 };
 
@@ -2435,7 +2426,7 @@ nv162_chipset = {
 	.fifo     = { 0x00000001, tu102_fifo_new },
 	.gr       = { 0x00000001, tu102_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
+	.nvenc    = { 0x00000001, gm107_nvenc_new },
 	.sec2 = tu102_sec2_new,
 };
 
@@ -2469,7 +2460,7 @@ nv164_chipset = {
 	.fifo     = { 0x00000001, tu102_fifo_new },
 	.gr       = { 0x00000001, tu102_gr_new },
 	.nvdec    = { 0x00000003, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
+	.nvenc    = { 0x00000001, gm107_nvenc_new },
 	.sec2 = tu102_sec2_new,
 };
 
@@ -2503,7 +2494,7 @@ nv166_chipset = {
 	.fifo     = { 0x00000001, tu102_fifo_new },
 	.gr       = { 0x00000001, tu102_gr_new },
 	.nvdec    = { 0x00000007, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
+	.nvenc    = { 0x00000001, gm107_nvenc_new },
 	.sec2 = tu102_sec2_new,
 };
 
@@ -2537,7 +2528,7 @@ nv167_chipset = {
 	.fifo     = { 0x00000001, tu102_fifo_new },
 	.gr       = { 0x00000001, tu102_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
+	.nvenc    = { 0x00000001, gm107_nvenc_new },
 	.sec2 = tu102_sec2_new,
 };
 
@@ -2571,7 +2562,7 @@ nv168_chipset = {
 	.fifo     = { 0x00000001, tu102_fifo_new },
 	.gr       = { 0x00000001, tu102_gr_new },
 	.nvdec    = { 0x00000001, gm107_nvdec_new },
-	.nvenc[0] = gm107_nvenc_new,
+	.nvenc    = { 0x00000001, gm107_nvenc_new },
 	.sec2 = tu102_sec2_new,
 };
 
@@ -3171,9 +3162,6 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 #include <core/layout.h>
 #undef NVKM_LAYOUT_INST
 #undef NVKM_LAYOUT_ONCE
-		_(NVKM_ENGINE_NVENC0  , nvenc[0]);
-		_(NVKM_ENGINE_NVENC1  , nvenc[1]);
-		_(NVKM_ENGINE_NVENC2  , nvenc[2]);
 		_(NVKM_ENGINE_PM      ,       pm);
 		_(NVKM_ENGINE_SEC     ,      sec);
 		_(NVKM_ENGINE_SEC2    ,     sec2);
@@ -3189,6 +3177,8 @@ nvkm_device_ctor(const struct nvkm_device_func *func,
 		case NVKM_ENGINE_CE8:
 		case NVKM_ENGINE_NVDEC1:
 		case NVKM_ENGINE_NVDEC2:
+		case NVKM_ENGINE_NVENC1:
+		case NVKM_ENGINE_NVENC2:
 			break;
 		default:
 			WARN_ON(1);

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/base.c

@@ -39,7 +39,7 @@ nvkm_nvenc = {
 
 int
 nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *fwif, struct nvkm_device *device,
-		int index, struct nvkm_nvenc **pnvenc)
+		enum nvkm_subdev_type type, int inst, struct nvkm_nvenc **pnvenc)
 {
 	struct nvkm_nvenc *nvenc;
 	int ret;
@@ -47,7 +47,7 @@ nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *fwif, struct nvkm_device *device,
 	if (!(nvenc = *pnvenc = kzalloc(sizeof(*nvenc), GFP_KERNEL)))
 		return -ENOMEM;
 
-	ret = nvkm_engine_ctor(&nvkm_nvenc, device, index, true,
+	ret = nvkm_engine_ctor(&nvkm_nvenc, device, type, inst, true,
 			       &nvenc->engine);
 	if (ret)
 		return ret;

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/gm107.c

@@ -56,8 +56,8 @@ gm107_nvenc_fwif[] = {
 };
 
 int
-gm107_nvenc_new(struct nvkm_device *device, int index,
+gm107_nvenc_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
 		struct nvkm_nvenc **pnvenc)
 {
-	return nvkm_nvenc_new_(gm107_nvenc_fwif, device, index, pnvenc);
+	return nvkm_nvenc_new_(gm107_nvenc_fwif, device, type, inst, pnvenc);
 }

drivers/gpu/drm/nouveau/nvkm/engine/nvenc/priv.h

@@ -14,6 +14,6 @@ struct nvkm_nvenc_fwif {
 	const struct nvkm_nvenc_func *func;
 };
 
-int nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *, struct nvkm_device *,
+int nvkm_nvenc_new_(const struct nvkm_nvenc_fwif *, struct nvkm_device *, enum nvkm_subdev_type,
 		    int, struct nvkm_nvenc **pnvenc);
 #endif