Commit eed0fd21 authored by Stefano Brivio's avatar Stefano Brivio Committed by John W. Linville

b43legacy: add definitions for MAC control register

This adds some definitions for the MAC control register and uses them. This is
basically no functional change.

The patch by Michael Buesch has been ported to b43legacy.
Signed-off-by: default avatarStefano Brivio <stefano.brivio@polimi.it>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 292ae174
...@@ -199,6 +199,13 @@ ...@@ -199,6 +199,13 @@
#define B43legacy_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */ #define B43legacy_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */
#define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */ #define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */
/* MAC Command bitfield */
#define B43legacy_MACCMD_BEACON0_VALID 0x00000001 /* Beacon 0 in template RAM is busy/valid */
#define B43legacy_MACCMD_BEACON1_VALID 0x00000002 /* Beacon 1 in template RAM is busy/valid */
#define B43legacy_MACCMD_DFQ_VALID 0x00000004 /* Directed frame queue valid (IBSS PS mode, ATIM) */
#define B43legacy_MACCMD_CCA 0x00000008 /* Clear channel assessment */
#define B43legacy_MACCMD_BGNOISE 0x00000010 /* Background noise */
/* 802.11 core specific TM State Low flags */ /* 802.11 core specific TM State Low flags */
#define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ #define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
#define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */ #define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */
...@@ -645,7 +652,7 @@ struct b43legacy_wldev { ...@@ -645,7 +652,7 @@ struct b43legacy_wldev {
bool __using_pio; /* Using pio rather than dma. */ bool __using_pio; /* Using pio rather than dma. */
bool bad_frames_preempt;/* Use "Bad Frames Preemption". */ bool bad_frames_preempt;/* Use "Bad Frames Preemption". */
bool reg124_set_0x4; /* Variable to keep track of IRQ. */ bool dfq_valid; /* Directed frame queue valid (IBSS PS mode, ATIM). */
bool short_preamble; /* TRUE if using short preamble. */ bool short_preamble; /* TRUE if using short preamble. */
bool short_slot; /* TRUE if using short slot timing. */ bool short_slot; /* TRUE if using short slot timing. */
bool radio_hw_enable; /* State of radio hardware enable bit. */ bool radio_hw_enable; /* State of radio hardware enable bit. */
......
...@@ -805,9 +805,8 @@ static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev) ...@@ -805,9 +805,8 @@ static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
{ {
b43legacy_jssi_write(dev, 0x7F7F7F7F); b43legacy_jssi_write(dev, 0x7F7F7F7F);
b43legacy_write32(dev, B43legacy_MMIO_MACCMD, b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
b43legacy_read32(dev, b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
B43legacy_MMIO_MACCMD) | B43legacy_MACCMD_BGNOISE);
| (1 << 4));
B43legacy_WARN_ON(dev->noisecalc.channel_at_start != B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
dev->phy.channel); dev->phy.channel);
} }
...@@ -896,18 +895,18 @@ static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev) ...@@ -896,18 +895,18 @@ static void handle_irq_tbtt_indication(struct b43legacy_wldev *dev)
if (1/*FIXME: the last PSpoll frame was sent successfully */) if (1/*FIXME: the last PSpoll frame was sent successfully */)
b43legacy_power_saving_ctl_bits(dev, -1, -1); b43legacy_power_saving_ctl_bits(dev, -1, -1);
} }
dev->reg124_set_0x4 = 0;
if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS)) if (b43legacy_is_mode(dev->wl, IEEE80211_IF_TYPE_IBSS))
dev->reg124_set_0x4 = 1; dev->dfq_valid = 1;
} }
static void handle_irq_atim_end(struct b43legacy_wldev *dev) static void handle_irq_atim_end(struct b43legacy_wldev *dev)
{ {
if (!dev->reg124_set_0x4) /*FIXME rename this variable*/ if (dev->dfq_valid) {
return;
b43legacy_write32(dev, B43legacy_MMIO_MACCMD, b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
b43legacy_read32(dev, B43legacy_MMIO_MACCMD) b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
| 0x4); | B43legacy_MACCMD_DFQ_VALID);
dev->dfq_valid = 0;
}
} }
static void handle_irq_pmq(struct b43legacy_wldev *dev) static void handle_irq_pmq(struct b43legacy_wldev *dev)
...@@ -1107,7 +1106,7 @@ static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev, ...@@ -1107,7 +1106,7 @@ static int b43legacy_refresh_cached_beacon(struct b43legacy_wldev *dev,
static void b43legacy_update_templates(struct b43legacy_wldev *dev) static void b43legacy_update_templates(struct b43legacy_wldev *dev)
{ {
u32 status; u32 cmd;
B43legacy_WARN_ON(!dev->cached_beacon); B43legacy_WARN_ON(!dev->cached_beacon);
...@@ -1118,9 +1117,9 @@ static void b43legacy_update_templates(struct b43legacy_wldev *dev) ...@@ -1118,9 +1117,9 @@ static void b43legacy_update_templates(struct b43legacy_wldev *dev)
b43legacy_write_probe_resp_template(dev, 0x268, 0x4A, b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
&b43legacy_b_ratetable[0]); &b43legacy_b_ratetable[0]);
status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
status |= 0x03; cmd |= B43legacy_MACCMD_BEACON0_VALID | B43legacy_MACCMD_BEACON1_VALID;
b43legacy_write32(dev, B43legacy_MMIO_MACCMD, status); b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd);
} }
static void b43legacy_refresh_templates(struct b43legacy_wldev *dev, static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
...@@ -2928,7 +2927,7 @@ static void setup_struct_phy_for_init(struct b43legacy_wldev *dev, ...@@ -2928,7 +2927,7 @@ static void setup_struct_phy_for_init(struct b43legacy_wldev *dev,
static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev) static void setup_struct_wldev_for_init(struct b43legacy_wldev *dev)
{ {
/* Flags */ /* Flags */
dev->reg124_set_0x4 = 0; dev->dfq_valid = 0;
/* Stats */ /* Stats */
memset(&dev->stats, 0, sizeof(dev->stats)); memset(&dev->stats, 0, sizeof(dev->stats));
......
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