Commit ef11a6ff authored by Mark Brown's avatar Mark Brown

Merge series "ASoC: SOF: Intel: add SoundWire support" from Pierre-Louis...

Merge series "ASoC: SOF: Intel: add SoundWire support" from Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>:

This patchset provides the support for SoundWire support on Intel
CometLake, IcelLake and TigerLake RVP platforms and form-factor
devices to be released 'soon'.

The bulk of the code is about detecting a valid SoundWire
configuration from ACPI, and implementing the interfaces suggested in
'[PATCH 0/8] soundwire: remove platform devices, add SOF interfaces'
for interrupts, PCI wakes and clock-stop configurations.

Since that SoundWire series will not be in 5.7, the build support for
SOF w/ SoundWire is not provided for now, and fall-back functions will
be used. This code is tested on a daily basis in the SOF tree and is
not expected to change in significant ways.

Changes since v2:
Corrected error in ACPI table (thanks Amadeusz)
Added patch 11 to add reset cycle required on some SoundWire platforms

Bard Liao (1):
  ASoC: SOF: Intel: hda: merge IPC, stream and SoundWire interrupt
    handlers

Pierre-Louis Bossart (8):
  ASoC: soc-acpi: expand description of _ADR-based devices
  ASoC: SOF: Intel: add SoundWire configuration interface
  ASoC: SOF: IPC: dai-intel: move ALH declarations in header file
  ASoC: SOF: Intel: hda: add SoundWire stream config/free callbacks
  ASoC: SOF: Intel: hda: initial SoundWire machine driver autodetect
  ASoC: SOF: Intel: hda: disable SoundWire interrupts on suspend
  ASoC: SOF: Intel: hda: add parameter to control SoundWire clock stop
    quirks
  ASoC: SOF: Intel: hda-ctrl: add reset cycle before parsing
    capabilities

Rander Wang (2):
  ASoC: SOF: Intel: hda: add WAKEEN interrupt support for SoundWire
  Asoc: SOF: Intel: hda: check SoundWire wakeen interrupt in irq thread

 include/sound/soc-acpi.h                      |  39 +-
 include/sound/sof/dai-intel.h                 |  18 +-
 .../intel/common/soc-acpi-intel-cml-match.c   |  87 +++-
 .../intel/common/soc-acpi-intel-icl-match.c   |  97 ++++-
 .../intel/common/soc-acpi-intel-tgl-match.c   |  49 ++-
 sound/soc/sof/intel/hda-ctrl.c                |  25 +-
 sound/soc/sof/intel/hda-dsp.c                 |   2 +
 sound/soc/sof/intel/hda-loader.c              |  31 ++
 sound/soc/sof/intel/hda.c                     | 400 ++++++++++++++++++
 sound/soc/sof/intel/hda.h                     |  66 +++
 10 files changed, 750 insertions(+), 64 deletions(-)

--
2.20.1
parents 914f674b f09e9c7f
......@@ -75,18 +75,45 @@ struct snd_soc_acpi_mach_params {
};
/**
* snd_soc_acpi_link_adr: ACPI-based list of _ADR, with a variable
* number of devices per link
*
* snd_soc_acpi_endpoint - endpoint descriptor
* @num: endpoint number (mandatory, unique per device)
* @aggregated: 0 (independent) or 1 (logically grouped)
* @group_position: zero-based order (only when @aggregated is 1)
* @group_id: platform-unique group identifier (only when @aggregrated is 1)
*/
struct snd_soc_acpi_endpoint {
u8 num;
u8 aggregated;
u8 group_position;
u8 group_id;
};
/**
* snd_soc_acpi_adr_device - descriptor for _ADR-enumerated device
* @adr: 64 bit ACPI _ADR value
* @num_endpoints: number of endpoints for this device
* @endpoints: array of endpoints
*/
struct snd_soc_acpi_adr_device {
const u64 adr;
const u8 num_endpoints;
const struct snd_soc_acpi_endpoint *endpoints;
};
/**
* snd_soc_acpi_link_adr - ACPI-based list of _ADR enumerated devices
* @mask: one bit set indicates the link this list applies to
* @num_adr: ARRAY_SIZE of adr
* @adr: array of _ADR (represented as u64).
* @num_adr: ARRAY_SIZE of devices
* @adr_d: array of devices
*
* The number of devices per link can be more than 1, e.g. in SoundWire
* multi-drop configurations.
*/
struct snd_soc_acpi_link_adr {
const u32 mask;
const u32 num_adr;
const u64 *adr;
const struct snd_soc_acpi_adr_device *adr_d;
};
/**
......
......@@ -87,6 +87,15 @@ struct sof_ipc_dai_hda_params {
uint32_t link_dma_ch;
} __packed;
/* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
struct sof_ipc_dai_alh_params {
struct sof_ipc_hdr hdr;
uint32_t stream_id;
/* reserved for future use */
uint32_t reserved[15];
} __packed;
/* DMIC Configuration Request - SOF_IPC_DAI_DMIC_CONFIG */
/* This struct is defined per 2ch PDM controller available in the platform.
......@@ -179,13 +188,4 @@ struct sof_ipc_dai_dmic_params {
struct sof_ipc_dai_dmic_pdm_ctrl pdm[0];
} __packed;
/* ALH Configuration Request - SOF_IPC_DAI_ALH_CONFIG */
struct sof_ipc_dai_alh_params {
struct sof_ipc_hdr hdr;
uint32_t stream_id;
/* reserved for future use */
uint32_t reserved[15];
} __packed;
#endif
......@@ -59,42 +59,95 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_cml_machines[] = {
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_cml_machines);
static const u64 rt711_0_adr[] = {
0x000010025D071100
static const struct snd_soc_acpi_endpoint single_endpoint = {
.num = 0,
.aggregated = 0,
.group_position = 0,
.group_id = 0,
};
static const u64 rt1308_1_adr[] = {
0x000110025D130800
static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
.num = 0,
.aggregated = 1,
.group_position = 0,
.group_id = 1,
};
static const u64 rt1308_2_adr[] = {
0x000210025D130800
static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
.num = 0,
.aggregated = 1,
.group_position = 1,
.group_id = 1,
};
static const u64 rt715_3_adr[] = {
0x000310025D071500
static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
{
.adr = 0x000010025D071100,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const struct snd_soc_acpi_adr_device rt1308_1_adr[] = {
{
.adr = 0x000110025D130800,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const struct snd_soc_acpi_adr_device rt1308_2_adr[] = {
{
.adr = 0x000210025D130800,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
{
.adr = 0x000110025D130800,
.num_endpoints = 1,
.endpoints = &spk_l_endpoint,
}
};
static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
{
.adr = 0x000210025D130800,
.num_endpoints = 1,
.endpoints = &spk_r_endpoint,
}
};
static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
{
.adr = 0x000310025D071500,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const struct snd_soc_acpi_link_adr cml_3_in_1_default[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
.adr_d = rt711_0_adr,
},
{
.mask = BIT(1),
.num_adr = ARRAY_SIZE(rt1308_1_adr),
.adr = rt1308_1_adr,
.num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
.adr_d = rt1308_1_group1_adr,
},
{
.mask = BIT(2),
.num_adr = ARRAY_SIZE(rt1308_2_adr),
.adr = rt1308_2_adr,
.num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
.adr_d = rt1308_2_group1_adr,
},
{
.mask = BIT(3),
.num_adr = ARRAY_SIZE(rt715_3_adr),
.adr = rt715_3_adr,
.adr_d = rt715_3_adr,
},
{}
};
......@@ -103,17 +156,17 @@ static const struct snd_soc_acpi_link_adr cml_3_in_1_mono_amp[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
.adr_d = rt711_0_adr,
},
{
.mask = BIT(1),
.num_adr = ARRAY_SIZE(rt1308_1_adr),
.adr = rt1308_1_adr,
.adr_d = rt1308_1_adr,
},
{
.mask = BIT(3),
.num_adr = ARRAY_SIZE(rt715_3_adr),
.adr = rt715_3_adr,
.adr_d = rt715_3_adr,
},
{}
};
......
......@@ -33,55 +33,112 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_icl_machines[] = {
};
EXPORT_SYMBOL_GPL(snd_soc_acpi_intel_icl_machines);
static const u64 rt700_0_adr[] = {
0x000010025D070000
static const struct snd_soc_acpi_endpoint single_endpoint = {
.num = 0,
.aggregated = 0,
.group_position = 0,
.group_id = 0,
};
static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
.num = 0,
.aggregated = 1,
.group_position = 0,
.group_id = 1,
};
static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
.num = 0,
.aggregated = 1,
.group_position = 1,
.group_id = 1,
};
static const struct snd_soc_acpi_adr_device rt700_0_adr[] = {
{
.adr = 0x000010025D070000,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const struct snd_soc_acpi_link_adr icl_rvp[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt700_0_adr),
.adr = rt700_0_adr,
.adr_d = rt700_0_adr,
},
{}
};
static const u64 rt711_0_adr[] = {
0x000010025D071100
static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
{
.adr = 0x000010025D071100,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const struct snd_soc_acpi_adr_device rt1308_1_adr[] = {
{
.adr = 0x000110025D130800,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const u64 rt1308_1_adr[] = {
0x000110025D130800
static const struct snd_soc_acpi_adr_device rt1308_2_adr[] = {
{
.adr = 0x000210025D130800,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const u64 rt1308_2_adr[] = {
0x000210025D130800
static const struct snd_soc_acpi_adr_device rt1308_1_group1_adr[] = {
{
.adr = 0x000110025D130800,
.num_endpoints = 1,
.endpoints = &spk_l_endpoint,
}
};
static const u64 rt715_3_adr[] = {
0x000310025D071500
static const struct snd_soc_acpi_adr_device rt1308_2_group1_adr[] = {
{
.adr = 0x000210025D130800,
.num_endpoints = 1,
.endpoints = &spk_r_endpoint,
}
};
static const struct snd_soc_acpi_adr_device rt715_3_adr[] = {
{
.adr = 0x000310025D071500,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const struct snd_soc_acpi_link_adr icl_3_in_1_default[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
.adr_d = rt711_0_adr,
},
{
.mask = BIT(1),
.num_adr = ARRAY_SIZE(rt1308_1_adr),
.adr = rt1308_1_adr,
.num_adr = ARRAY_SIZE(rt1308_1_group1_adr),
.adr_d = rt1308_1_group1_adr,
},
{
.mask = BIT(2),
.num_adr = ARRAY_SIZE(rt1308_2_adr),
.adr = rt1308_2_adr,
.num_adr = ARRAY_SIZE(rt1308_2_group1_adr),
.adr_d = rt1308_2_group1_adr,
},
{
.mask = BIT(3),
.num_adr = ARRAY_SIZE(rt715_3_adr),
.adr = rt715_3_adr,
.adr_d = rt715_3_adr,
},
{}
};
......@@ -90,17 +147,17 @@ static const struct snd_soc_acpi_link_adr icl_3_in_1_mono_amp[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
.adr_d = rt711_0_adr,
},
{
.mask = BIT(1),
.num_adr = ARRAY_SIZE(rt1308_1_adr),
.adr = rt1308_1_adr,
.adr_d = rt1308_1_adr,
},
{
.mask = BIT(3),
.num_adr = ARRAY_SIZE(rt715_3_adr),
.adr = rt715_3_adr,
.adr_d = rt715_3_adr,
},
{}
};
......
......@@ -14,20 +14,53 @@ static struct snd_soc_acpi_codecs tgl_codecs = {
.codecs = {"MX98357A"}
};
static const u64 rt711_0_adr[] = {
0x000010025D071100
static const struct snd_soc_acpi_endpoint single_endpoint = {
.num = 0,
.aggregated = 0,
.group_position = 0,
.group_id = 0,
};
static const u64 rt1308_1_adr[] = {
0x000120025D130800,
0x000122025D130800
static const struct snd_soc_acpi_endpoint spk_l_endpoint = {
.num = 0,
.aggregated = 1,
.group_position = 0,
.group_id = 1,
};
static const struct snd_soc_acpi_endpoint spk_r_endpoint = {
.num = 0,
.aggregated = 1,
.group_position = 1,
.group_id = 1,
};
static const struct snd_soc_acpi_adr_device rt711_0_adr[] = {
{
.adr = 0x000010025D071100,
.num_endpoints = 1,
.endpoints = &single_endpoint,
}
};
static const struct snd_soc_acpi_adr_device rt1308_1_adr[] = {
{
.adr = 0x000120025D130800,
.num_endpoints = 1,
.endpoints = &spk_l_endpoint,
},
{
.adr = 0x000122025D130800,
.num_endpoints = 1,
.endpoints = &spk_r_endpoint,
}
};
static const struct snd_soc_acpi_link_adr tgl_i2s_rt1308[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
.adr_d = rt711_0_adr,
},
{}
};
......@@ -36,12 +69,12 @@ static const struct snd_soc_acpi_link_adr tgl_rvp[] = {
{
.mask = BIT(0),
.num_adr = ARRAY_SIZE(rt711_0_adr),
.adr = rt711_0_adr,
.adr_d = rt711_0_adr,
},
{
.mask = BIT(1),
.num_adr = ARRAY_SIZE(rt1308_1_adr),
.adr = rt1308_1_adr,
.adr_d = rt1308_1_adr,
},
{}
};
......
......@@ -65,15 +65,32 @@ int hda_dsp_ctrl_get_caps(struct snd_sof_dev *sdev)
struct hdac_bus *bus = sof_to_bus(sdev);
u32 cap, offset, feature;
int count = 0;
int ret;
/*
* On some devices, one reset cycle is necessary before reading
* capabilities
*/
ret = hda_dsp_ctrl_link_reset(sdev, true);
if (ret < 0)
return ret;
ret = hda_dsp_ctrl_link_reset(sdev, false);
if (ret < 0)
return ret;
offset = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, SOF_HDA_LLCH);
do {
cap = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, offset);
dev_dbg(sdev->dev, "checking for capabilities at offset 0x%x\n",
offset & SOF_HDA_CAP_NEXT_MASK);
cap = snd_sof_dsp_read(sdev, HDA_DSP_HDA_BAR, offset);
if (cap == -1) {
dev_dbg(bus->dev, "Invalid capability reg read\n");
break;
}
feature = (cap & SOF_HDA_CAP_ID_MASK) >> SOF_HDA_CAP_ID_OFF;
switch (feature) {
......@@ -106,7 +123,7 @@ int hda_dsp_ctrl_get_caps(struct snd_sof_dev *sdev)
bus->mlcap = bus->remap_addr + offset;
break;
default:
dev_vdbg(sdev->dev, "found capability %d at 0x%x\n",
dev_dbg(sdev->dev, "found capability %d at 0x%x\n",
feature, offset);
break;
}
......
......@@ -594,6 +594,8 @@ static int hda_suspend(struct snd_sof_dev *sdev, bool runtime_suspend)
#endif
int ret;
hda_sdw_int_enable(sdev, false);
/* disable IPC interrupts */
hda_dsp_ipc_int_disable(sdev);
......
......@@ -346,6 +346,24 @@ int hda_dsp_cl_boot_firmware(struct snd_sof_dev *sdev)
goto cleanup;
}
/*
* When a SoundWire link is in clock stop state, a Slave
* device may trigger in-band wakes for events such as jack
* insertion or acoustic event detection. This event will lead
* to a WAKEEN interrupt, handled by the PCI device and routed
* to PME if the PCI device is in D3. The resume function in
* audio PCI driver will be invoked by ACPI for PME event and
* initialize the device and process WAKEEN interrupt.
*
* The WAKEEN interrupt should be processed ASAP to prevent an
* interrupt flood, otherwise other interrupts, such IPC,
* cannot work normally. The WAKEEN is handled after the ROM
* is initialized successfully, which ensures power rails are
* enabled before accessing the SoundWire SHIM registers
*/
if (!sdev->first_boot)
hda_sdw_process_wakeen(sdev);
/*
* at this point DSP ROM has been initialized and
* should be ready for code loading and firmware boot
......@@ -399,6 +417,19 @@ int hda_dsp_pre_fw_run(struct snd_sof_dev *sdev)
/* post fw run operations */
int hda_dsp_post_fw_run(struct snd_sof_dev *sdev)
{
int ret;
if (sdev->first_boot) {
ret = hda_sdw_startup(sdev);
if (ret < 0) {
dev_err(sdev->dev,
"error: could not startup SoundWire links\n");
return ret;
}
}
hda_sdw_int_enable(sdev, true);
/* re-enable clock gating and power gating */
return hda_dsp_ctrl_clock_power_gating(sdev, true);
}
This diff is collapsed.
......@@ -11,6 +11,8 @@
#ifndef __SOF_INTEL_HDA_H
#define __SOF_INTEL_HDA_H
#include <linux/soundwire/sdw.h>
#include <linux/soundwire/sdw_intel.h>
#include <sound/compress_driver.h>
#include <sound/hda_codec.h>
#include <sound/hdaudio_ext.h>
......@@ -230,6 +232,9 @@
#define HDA_DSP_REG_ADSPIC2 (HDA_DSP_GEN_BASE + 0x10)
#define HDA_DSP_REG_ADSPIS2 (HDA_DSP_GEN_BASE + 0x14)
#define HDA_DSP_REG_ADSPIS2_SNDW BIT(5)
#define HDA_DSP_REG_SNDW_WAKE_STS 0x2C192
/* Intel HD Audio Inter-Processor Communication Registers */
#define HDA_DSP_IPC_BASE 0x40
#define HDA_DSP_REG_HIPCT (HDA_DSP_IPC_BASE + 0x00)
......@@ -436,6 +441,12 @@ struct sof_intel_hda_dev {
/* delayed work to enter D0I3 opportunistically */
struct delayed_work d0i3_work;
/* ACPI information stored between scan and probe steps */
struct sdw_intel_acpi_info info;
/* sdw context allocated by SoundWire driver */
struct sdw_intel_ctx *sdw;
};
static inline struct hdac_bus *sof_to_bus(struct snd_sof_dev *s)
......@@ -654,6 +665,61 @@ int hda_dsp_trace_init(struct snd_sof_dev *sdev, u32 *stream_tag);
int hda_dsp_trace_release(struct snd_sof_dev *sdev);
int hda_dsp_trace_trigger(struct snd_sof_dev *sdev, int cmd);
/*
* SoundWire support
*/
#if IS_ENABLED(CONFIG_SND_SOC_SOF_INTEL_SOUNDWIRE)
int hda_sdw_startup(struct snd_sof_dev *sdev);
void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable);
void hda_sdw_process_wakeen(struct snd_sof_dev *sdev);
#else
static inline int hda_sdw_acpi_scan(struct snd_sof_dev *sdev)
{
return 0;
}
static inline int hda_sdw_probe(struct snd_sof_dev *sdev)
{
return 0;
}
static inline int hda_sdw_startup(struct snd_sof_dev *sdev)
{
return 0;
}
static inline int hda_sdw_exit(struct snd_sof_dev *sdev)
{
return 0;
}
static inline void hda_sdw_int_enable(struct snd_sof_dev *sdev, bool enable)
{
}
static inline bool hda_dsp_check_sdw_irq(struct snd_sof_dev *sdev)
{
return false;
}
static inline irqreturn_t hda_dsp_sdw_thread(int irq, void *context)
{
return IRQ_HANDLED;
}
static inline bool hda_sdw_check_wakeen_irq(struct snd_sof_dev *sdev)
{
return false;
}
static inline void hda_sdw_process_wakeen(struct snd_sof_dev *sdev)
{
}
#endif
/* common dai driver */
extern struct snd_soc_dai_driver skl_dai[];
......
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