Commit ef833eab authored by Eugeniy Paltsev's avatar Eugeniy Paltsev Committed by Vineet Gupta

ARC: [plat-hsdk] use actual clk driver to manage cpu clk

With corresponding clk driver now merged upstream, switch to it.

 - core_clk now represent the PLL (vs. fixed clk before)
 - input_clk represent the clk signal src for PLL (basically xtal)
Signed-off-by: default avatarEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: default avatarVineet Gupta <vgupta@synopsys.com>
parent 9583833e
...@@ -57,10 +57,10 @@ cpu@3 { ...@@ -57,10 +57,10 @@ cpu@3 {
}; };
}; };
core_clk: core-clk { input_clk: input-clk {
#clock-cells = <0>; #clock-cells = <0>;
compatible = "fixed-clock"; compatible = "fixed-clock";
clock-frequency = <500000000>; clock-frequency = <33333333>;
}; };
cpu_intc: cpu-interrupt-controller { cpu_intc: cpu-interrupt-controller {
...@@ -102,6 +102,13 @@ soc { ...@@ -102,6 +102,13 @@ soc {
ranges = <0x00000000 0xf0000000 0x10000000>; ranges = <0x00000000 0xf0000000 0x10000000>;
core_clk: core-clk@0 {
compatible = "snps,hsdk-core-pll-clock";
reg = <0x00 0x10>, <0x14B8 0x4>;
#clock-cells = <0>;
clocks = <&input_clk>;
};
serial: serial@5000 { serial: serial@5000 {
compatible = "snps,dw-apb-uart"; compatible = "snps,dw-apb-uart";
reg = <0x5000 0x100>; reg = <0x5000 0x100>;
......
...@@ -6,4 +6,5 @@ ...@@ -6,4 +6,5 @@
# #
menuconfig ARC_SOC_HSDK menuconfig ARC_SOC_HSDK
bool "ARC HS Development Kit SOC" bool "ARC HS Development Kit SOC"
select CLK_HSDK
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