Commit ef88d7a8 authored by Dave Airlie's avatar Dave Airlie

Merge tag 'drm-intel-fixes-2021-09-23' of...

Merge tag 'drm-intel-fixes-2021-09-23' of git://anongit.freedesktop.org/drm/drm-intel into drm-fixes

drm/i915 fixes for v5.15-rc3:
- Fix ADL-P memory bandwidth parameters
- Fix memory corruption due to a double free
- Fix memory leak in DMC firmware handling
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
From: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/87o88jbk3o.fsf@intel.com
parents 22a94600 b875fb31
...@@ -222,31 +222,42 @@ static int icl_sagv_max_dclk(const struct intel_qgv_info *qi) ...@@ -222,31 +222,42 @@ static int icl_sagv_max_dclk(const struct intel_qgv_info *qi)
struct intel_sa_info { struct intel_sa_info {
u16 displayrtids; u16 displayrtids;
u8 deburst, deprogbwlimit; u8 deburst, deprogbwlimit, derating;
}; };
static const struct intel_sa_info icl_sa_info = { static const struct intel_sa_info icl_sa_info = {
.deburst = 8, .deburst = 8,
.deprogbwlimit = 25, /* GB/s */ .deprogbwlimit = 25, /* GB/s */
.displayrtids = 128, .displayrtids = 128,
.derating = 10,
}; };
static const struct intel_sa_info tgl_sa_info = { static const struct intel_sa_info tgl_sa_info = {
.deburst = 16, .deburst = 16,
.deprogbwlimit = 34, /* GB/s */ .deprogbwlimit = 34, /* GB/s */
.displayrtids = 256, .displayrtids = 256,
.derating = 10,
}; };
static const struct intel_sa_info rkl_sa_info = { static const struct intel_sa_info rkl_sa_info = {
.deburst = 16, .deburst = 16,
.deprogbwlimit = 20, /* GB/s */ .deprogbwlimit = 20, /* GB/s */
.displayrtids = 128, .displayrtids = 128,
.derating = 10,
}; };
static const struct intel_sa_info adls_sa_info = { static const struct intel_sa_info adls_sa_info = {
.deburst = 16, .deburst = 16,
.deprogbwlimit = 38, /* GB/s */ .deprogbwlimit = 38, /* GB/s */
.displayrtids = 256, .displayrtids = 256,
.derating = 10,
};
static const struct intel_sa_info adlp_sa_info = {
.deburst = 16,
.deprogbwlimit = 38, /* GB/s */
.displayrtids = 256,
.derating = 20,
}; };
static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel_sa_info *sa) static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel_sa_info *sa)
...@@ -302,7 +313,7 @@ static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel ...@@ -302,7 +313,7 @@ static int icl_get_bw_info(struct drm_i915_private *dev_priv, const struct intel
bw = icl_calc_bw(sp->dclk, clpchgroup * 32 * num_channels, ct); bw = icl_calc_bw(sp->dclk, clpchgroup * 32 * num_channels, ct);
bi->deratedbw[j] = min(maxdebw, bi->deratedbw[j] = min(maxdebw,
bw * 9 / 10); /* 90% */ bw * (100 - sa->derating) / 100);
drm_dbg_kms(&dev_priv->drm, drm_dbg_kms(&dev_priv->drm,
"BW%d / QGV %d: num_planes=%d deratedbw=%u\n", "BW%d / QGV %d: num_planes=%d deratedbw=%u\n",
...@@ -400,7 +411,9 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv) ...@@ -400,7 +411,9 @@ void intel_bw_init_hw(struct drm_i915_private *dev_priv)
if (IS_DG2(dev_priv)) if (IS_DG2(dev_priv))
dg2_get_bw_info(dev_priv); dg2_get_bw_info(dev_priv);
else if (IS_ALDERLAKE_S(dev_priv) || IS_ALDERLAKE_P(dev_priv)) else if (IS_ALDERLAKE_P(dev_priv))
icl_get_bw_info(dev_priv, &adlp_sa_info);
else if (IS_ALDERLAKE_S(dev_priv))
icl_get_bw_info(dev_priv, &adls_sa_info); icl_get_bw_info(dev_priv, &adls_sa_info);
else if (IS_ROCKETLAKE(dev_priv)) else if (IS_ROCKETLAKE(dev_priv))
icl_get_bw_info(dev_priv, &rkl_sa_info); icl_get_bw_info(dev_priv, &rkl_sa_info);
......
...@@ -805,11 +805,14 @@ void intel_dmc_ucode_resume(struct drm_i915_private *dev_priv) ...@@ -805,11 +805,14 @@ void intel_dmc_ucode_resume(struct drm_i915_private *dev_priv)
*/ */
void intel_dmc_ucode_fini(struct drm_i915_private *dev_priv) void intel_dmc_ucode_fini(struct drm_i915_private *dev_priv)
{ {
int id;
if (!HAS_DMC(dev_priv)) if (!HAS_DMC(dev_priv))
return; return;
intel_dmc_ucode_suspend(dev_priv); intel_dmc_ucode_suspend(dev_priv);
drm_WARN_ON(&dev_priv->drm, dev_priv->dmc.wakeref); drm_WARN_ON(&dev_priv->drm, dev_priv->dmc.wakeref);
kfree(dev_priv->dmc.dmc_info[DMC_FW_MAIN].payload); for (id = 0; id < DMC_FW_MAX; id++)
kfree(dev_priv->dmc.dmc_info[id].payload);
} }
...@@ -356,11 +356,8 @@ static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo) ...@@ -356,11 +356,8 @@ static void i915_ttm_delete_mem_notify(struct ttm_buffer_object *bo)
{ {
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo); struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
if (likely(obj)) { if (likely(obj))
/* This releases all gem object bindings to the backend. */
i915_ttm_free_cached_io_st(obj); i915_ttm_free_cached_io_st(obj);
__i915_gem_free_object(obj);
}
} }
static struct intel_memory_region * static struct intel_memory_region *
...@@ -875,8 +872,12 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo) ...@@ -875,8 +872,12 @@ void i915_ttm_bo_destroy(struct ttm_buffer_object *bo)
{ {
struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo); struct drm_i915_gem_object *obj = i915_ttm_to_gem(bo);
/* This releases all gem object bindings to the backend. */
__i915_gem_free_object(obj);
i915_gem_object_release_memory_region(obj); i915_gem_object_release_memory_region(obj);
mutex_destroy(&obj->ttm.get_io_page.lock); mutex_destroy(&obj->ttm.get_io_page.lock);
if (obj->ttm.created) if (obj->ttm.created)
call_rcu(&obj->rcu, __i915_gem_free_object_rcu); call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
} }
......
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