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Commit f012ade8 authored by Dmitry Osipenko's avatar Dmitry Osipenko Committed by Krzysztof Kozlowski
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memory: tegra: Print out info-level once per driver probe 

Probing of EMC drivers may be deferred and in this case we get duplicated
info messages during kernel boot. Use dev_info_once() helper to silence
the duplicated messages.
Signed-off-by: default avatarDmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210330230445.26619-7-digetx@gmail.comSigned-off-by: default avatarKrzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
parent 28947198
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Showing with 25 additions and 25 deletions
drivers/memory/tegra/tegra124-emc.c
View file @ f012ade8
...@@ -905,7 +905,7 @@ static int emc_init(struct tegra_emc *emc) ...@@ -905,7 +905,7 @@ static int emc_init(struct tegra_emc *emc)
else else
emc->dram_bus_width = 32; emc->dram_bus_width = 32;
dev_info(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width); dev_info_once(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width);
emc->dram_type &= EMC_FBIO_CFG5_DRAM_TYPE_MASK; emc->dram_type &= EMC_FBIO_CFG5_DRAM_TYPE_MASK;
emc->dram_type >>= EMC_FBIO_CFG5_DRAM_TYPE_SHIFT; emc->dram_type >>= EMC_FBIO_CFG5_DRAM_TYPE_SHIFT;
...@@ -1419,7 +1419,7 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc) ...@@ -1419,7 +1419,7 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc)
goto put_hw_table; goto put_hw_table;
} }
dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", dev_info_once(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n",
hw_version, clk_get_rate(emc->clk) / 1000000); hw_version, clk_get_rate(emc->clk) / 1000000);
/* first dummy rate-set initializes voltage state */ /* first dummy rate-set initializes voltage state */
...@@ -1475,7 +1475,7 @@ static int tegra_emc_probe(struct platform_device *pdev) ...@@ -1475,7 +1475,7 @@ static int tegra_emc_probe(struct platform_device *pdev)
if (err) if (err)
return err; return err;
} else { } else {
dev_info(&pdev->dev, dev_info_once(&pdev->dev,
"no memory timings for RAM code %u found in DT\n", "no memory timings for RAM code %u found in DT\n",
ram_code); ram_code);
} }
......
drivers/memory/tegra/tegra20-emc.c
View file @ f012ade8
...@@ -411,7 +411,7 @@ static int tegra_emc_load_timings_from_dt(struct tegra_emc *emc, ...@@ -411,7 +411,7 @@ static int tegra_emc_load_timings_from_dt(struct tegra_emc *emc,
sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings, sort(emc->timings, emc->num_timings, sizeof(*timing), cmp_timings,
NULL); NULL);
dev_info(emc->dev, dev_info_once(emc->dev,
"got %u timings for RAM code %u (min %luMHz max %luMHz)\n", "got %u timings for RAM code %u (min %luMHz max %luMHz)\n",
emc->num_timings, emc->num_timings,
tegra_read_ram_code(), tegra_read_ram_code(),
...@@ -429,7 +429,7 @@ tegra_emc_find_node_by_ram_code(struct device *dev) ...@@ -429,7 +429,7 @@ tegra_emc_find_node_by_ram_code(struct device *dev)
int err; int err;
if (of_get_child_count(dev->of_node) == 0) { if (of_get_child_count(dev->of_node) == 0) {
dev_info(dev, "device-tree doesn't have memory timings\n"); dev_info_once(dev, "device-tree doesn't have memory timings\n");
return NULL; return NULL;
} }
...@@ -496,7 +496,7 @@ static int emc_setup_hw(struct tegra_emc *emc) ...@@ -496,7 +496,7 @@ static int emc_setup_hw(struct tegra_emc *emc)
else else
emc->dram_bus_width = 32; emc->dram_bus_width = 32;
dev_info(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width); dev_info_once(emc->dev, "%ubit DRAM bus\n", emc->dram_bus_width);
return 0; return 0;
} }
...@@ -931,7 +931,7 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc) ...@@ -931,7 +931,7 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc)
goto put_hw_table; goto put_hw_table;
} }
dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", dev_info_once(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n",
hw_version, clk_get_rate(emc->clk) / 1000000); hw_version, clk_get_rate(emc->clk) / 1000000);
/* first dummy rate-set initializes voltage state */ /* first dummy rate-set initializes voltage state */
......
drivers/memory/tegra/tegra30-emc.c
View file @ f012ade8
...@@ -998,7 +998,7 @@ static int emc_load_timings_from_dt(struct tegra_emc *emc, ...@@ -998,7 +998,7 @@ static int emc_load_timings_from_dt(struct tegra_emc *emc,
if (err) if (err)
return err; return err;
dev_info(emc->dev, dev_info_once(emc->dev,
"got %u timings for RAM code %u (min %luMHz max %luMHz)\n", "got %u timings for RAM code %u (min %luMHz max %luMHz)\n",
emc->num_timings, emc->num_timings,
tegra_read_ram_code(), tegra_read_ram_code(),
...@@ -1015,7 +1015,7 @@ static struct device_node *emc_find_node_by_ram_code(struct device *dev) ...@@ -1015,7 +1015,7 @@ static struct device_node *emc_find_node_by_ram_code(struct device *dev)
int err; int err;
if (of_get_child_count(dev->of_node) == 0) { if (of_get_child_count(dev->of_node) == 0) {
dev_info(dev, "device-tree doesn't have memory timings\n"); dev_info_once(dev, "device-tree doesn't have memory timings\n");
return NULL; return NULL;
} }
...@@ -1503,7 +1503,7 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc) ...@@ -1503,7 +1503,7 @@ static int tegra_emc_opp_table_init(struct tegra_emc *emc)
goto put_hw_table; goto put_hw_table;
} }
dev_info(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n", dev_info_once(emc->dev, "OPP HW ver. 0x%x, current clock rate %lu MHz\n",
hw_version, clk_get_rate(emc->clk) / 1000000); hw_version, clk_get_rate(emc->clk) / 1000000);
/* first dummy rate-set initializes voltage state */ /* first dummy rate-set initializes voltage state */
......
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