Commit f0798d8f authored by Jani Nikula's avatar Jani Nikula

drm/i915/crt: switch to intel_de_* register accessors in display code

Avoid direct uncore use in display code.

Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarAndrzej Hajda <andrzej.hajda@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/39c198439be580052d1f78a44c96df7ba8ffd56d.1670433372.git.jani.nikula@intel.com
parent 330bdd96
...@@ -682,7 +682,6 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) ...@@ -682,7 +682,6 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
{ {
struct drm_device *dev = crt->base.base.dev; struct drm_device *dev = crt->base.base.dev;
struct drm_i915_private *dev_priv = to_i915(dev); struct drm_i915_private *dev_priv = to_i915(dev);
struct intel_uncore *uncore = &dev_priv->uncore;
u32 save_bclrpat; u32 save_bclrpat;
u32 save_vtotal; u32 save_vtotal;
u32 vtotal, vactive; u32 vtotal, vactive;
...@@ -694,9 +693,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) ...@@ -694,9 +693,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
drm_dbg_kms(&dev_priv->drm, "starting load-detect on CRT\n"); drm_dbg_kms(&dev_priv->drm, "starting load-detect on CRT\n");
save_bclrpat = intel_uncore_read(uncore, BCLRPAT(pipe)); save_bclrpat = intel_de_read(dev_priv, BCLRPAT(pipe));
save_vtotal = intel_uncore_read(uncore, VTOTAL(pipe)); save_vtotal = intel_de_read(dev_priv, VTOTAL(pipe));
vblank = intel_uncore_read(uncore, VBLANK(pipe)); vblank = intel_de_read(dev_priv, VBLANK(pipe));
vtotal = ((save_vtotal >> 16) & 0xfff) + 1; vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
vactive = (save_vtotal & 0x7ff) + 1; vactive = (save_vtotal & 0x7ff) + 1;
...@@ -705,23 +704,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) ...@@ -705,23 +704,23 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
vblank_end = ((vblank >> 16) & 0xfff) + 1; vblank_end = ((vblank >> 16) & 0xfff) + 1;
/* Set the border color to purple. */ /* Set the border color to purple. */
intel_uncore_write(uncore, BCLRPAT(pipe), 0x500050); intel_de_write(dev_priv, BCLRPAT(pipe), 0x500050);
if (DISPLAY_VER(dev_priv) != 2) { if (DISPLAY_VER(dev_priv) != 2) {
u32 pipeconf = intel_uncore_read(uncore, PIPECONF(pipe)); u32 pipeconf = intel_de_read(dev_priv, PIPECONF(pipe));
intel_uncore_write(uncore,
PIPECONF(pipe), intel_de_write(dev_priv, PIPECONF(pipe),
pipeconf | PIPECONF_FORCE_BORDER); pipeconf | PIPECONF_FORCE_BORDER);
intel_uncore_posting_read(uncore, PIPECONF(pipe)); intel_de_posting_read(dev_priv, PIPECONF(pipe));
/* Wait for next Vblank to substitue /* Wait for next Vblank to substitue
* border color for Color info */ * border color for Color info */
intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe)); intel_crtc_wait_for_next_vblank(intel_crtc_for_pipe(dev_priv, pipe));
st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE); st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
status = ((st00 & (1 << 4)) != 0) ? status = ((st00 & (1 << 4)) != 0) ?
connector_status_connected : connector_status_connected :
connector_status_disconnected; connector_status_disconnected;
intel_uncore_write(uncore, PIPECONF(pipe), pipeconf); intel_de_write(dev_priv, PIPECONF(pipe), pipeconf);
} else { } else {
bool restore_vblank = false; bool restore_vblank = false;
int count, detect; int count, detect;
...@@ -735,10 +734,8 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) ...@@ -735,10 +734,8 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
u32 vsync_start = (vsync & 0xffff) + 1; u32 vsync_start = (vsync & 0xffff) + 1;
vblank_start = vsync_start; vblank_start = vsync_start;
intel_uncore_write(uncore, intel_de_write(dev_priv, VBLANK(pipe),
VBLANK(pipe), (vblank_start - 1) | ((vblank_end - 1) << 16));
(vblank_start - 1) |
((vblank_end - 1) << 16));
restore_vblank = true; restore_vblank = true;
} }
/* sample in the vertical border, selecting the larger one */ /* sample in the vertical border, selecting the larger one */
...@@ -750,10 +747,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) ...@@ -750,10 +747,9 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
/* /*
* Wait for the border to be displayed * Wait for the border to be displayed
*/ */
while (intel_uncore_read(uncore, PIPEDSL(pipe)) >= vactive) while (intel_de_read(dev_priv, PIPEDSL(pipe)) >= vactive)
; ;
while ((dsl = intel_uncore_read(uncore, PIPEDSL(pipe))) <= while ((dsl = intel_de_read(dev_priv, PIPEDSL(pipe))) <= vsample)
vsample)
; ;
/* /*
* Watch ST00 for an entire scanline * Watch ST00 for an entire scanline
...@@ -763,14 +759,14 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) ...@@ -763,14 +759,14 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
do { do {
count++; count++;
/* Read the ST00 VGA status register */ /* Read the ST00 VGA status register */
st00 = intel_uncore_read8(uncore, _VGA_MSR_WRITE); st00 = intel_de_read8(dev_priv, _VGA_MSR_WRITE);
if (st00 & (1 << 4)) if (st00 & (1 << 4))
detect++; detect++;
} while ((intel_uncore_read(uncore, PIPEDSL(pipe)) == dsl)); } while ((intel_de_read(dev_priv, PIPEDSL(pipe)) == dsl));
/* restore vblank if necessary */ /* restore vblank if necessary */
if (restore_vblank) if (restore_vblank)
intel_uncore_write(uncore, VBLANK(pipe), vblank); intel_de_write(dev_priv, VBLANK(pipe), vblank);
/* /*
* If more than 3/4 of the scanline detected a monitor, * If more than 3/4 of the scanline detected a monitor,
* then it is assumed to be present. This works even on i830, * then it is assumed to be present. This works even on i830,
...@@ -783,7 +779,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe) ...@@ -783,7 +779,7 @@ intel_crt_load_detect(struct intel_crt *crt, u32 pipe)
} }
/* Restore previous settings */ /* Restore previous settings */
intel_uncore_write(uncore, BCLRPAT(pipe), save_bclrpat); intel_de_write(dev_priv, BCLRPAT(pipe), save_bclrpat);
return status; return status;
} }
......
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