Commit f0a0a58e authored by Alexandre Belloni's avatar Alexandre Belloni Committed by Nicolas Ferre

ARM: at91: move sdramc/ddrsdr header to include/soc/at91

Move the (DDR) SDRAM controller headers to include/soc/at91 to remove the
dependency on mach/ headers from the at91-reset driver.
Signed-off-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
parent 93d2cf46
...@@ -861,6 +861,7 @@ W: http://maxim.org.za/at91_26.html ...@@ -861,6 +861,7 @@ W: http://maxim.org.za/at91_26.html
W: http://www.linux4sam.org W: http://www.linux4sam.org
S: Supported S: Supported
F: arch/arm/mach-at91/ F: arch/arm/mach-at91/
F: include/soc/at91/
F: arch/arm/boot/dts/at91*.dts F: arch/arm/boot/dts/at91*.dts
F: arch/arm/boot/dts/at91*.dtsi F: arch/arm/boot/dts/at91*.dtsi
F: arch/arm/boot/dts/sama*.dts F: arch/arm/boot/dts/sama*.dts
......
...@@ -25,8 +25,8 @@ extern void __iomem *at91_ramc_base[]; ...@@ -25,8 +25,8 @@ extern void __iomem *at91_ramc_base[];
#define AT91_MEMCTRL_SDRAMC 1 #define AT91_MEMCTRL_SDRAMC 1
#define AT91_MEMCTRL_DDRSDR 2 #define AT91_MEMCTRL_DDRSDR 2
#include <mach/at91rm9200_sdramc.h> #include <soc/at91/at91rm9200_sdramc.h>
#include <mach/at91sam9_ddrsdr.h> #include <soc/at91/at91sam9_ddrsdr.h>
#include <mach/at91sam9_sdramc.h> #include <soc/at91/at91sam9_sdramc.h>
#endif /* __AT91_RAMC_H__ */ #endif /* __AT91_RAMC_H__ */
...@@ -14,7 +14,6 @@ ...@@ -14,7 +14,6 @@
#include <asm/proc-fns.h> #include <asm/proc-fns.h>
#include <mach/at91_ramc.h> #include <mach/at91_ramc.h>
#include <mach/at91rm9200_sdramc.h>
#ifdef CONFIG_PM #ifdef CONFIG_PM
extern void at91_pm_set_standby(void (*at91_standby)(void)); extern void at91_pm_set_standby(void (*at91_standby)(void));
......
...@@ -19,8 +19,8 @@ ...@@ -19,8 +19,8 @@
#include <asm/system_misc.h> #include <asm/system_misc.h>
#include <mach/at91sam9_ddrsdr.h> #include <soc/at91/at91sam9_ddrsdr.h>
#include <mach/at91sam9_sdramc.h> #include <soc/at91/at91sam9_sdramc.h>
#define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */ #define AT91_RSTC_CR 0x00 /* Reset Controller Control Register */
#define AT91_RSTC_PROCRST BIT(0) /* Processor Reset */ #define AT91_RSTC_PROCRST BIT(0) /* Processor Reset */
......
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