Commit f1a4c1f3 authored by Chanwoo Choi's avatar Chanwoo Choi Committed by Krzysztof Kozlowski

clocksource: exynos_mct: Add the support for ARM64

This patch allows building and compile-testing the driver also for
ARM64.  The delay_timer is only supported on ARMv7.

Cc: Daniel Lezcano <daniel.lezcano@linaro.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: default avatarChanwoo Choi <cw00.choi@samsung.com>
Acked-by: default avatarDaniel Lezcano <daniel.lezcano@linaro.org>
[k.kozlowski: Adjusted commit msg]
Signed-off-by: default avatarKrzysztof Kozlowski <k.kozlowski@samsung.com>
parent 29b4817d
...@@ -351,7 +351,7 @@ config CLKSRC_METAG_GENERIC ...@@ -351,7 +351,7 @@ config CLKSRC_METAG_GENERIC
config CLKSRC_EXYNOS_MCT config CLKSRC_EXYNOS_MCT
bool "Exynos multi core timer driver" if COMPILE_TEST bool "Exynos multi core timer driver" if COMPILE_TEST
depends on ARM depends on ARM || ARM64
help help
Support for Multi Core Timer controller on Exynos SoCs. Support for Multi Core Timer controller on Exynos SoCs.
......
...@@ -223,6 +223,7 @@ static u64 notrace exynos4_read_sched_clock(void) ...@@ -223,6 +223,7 @@ static u64 notrace exynos4_read_sched_clock(void)
return exynos4_read_count_32(); return exynos4_read_count_32();
} }
#if defined(CONFIG_ARM)
static struct delay_timer exynos4_delay_timer; static struct delay_timer exynos4_delay_timer;
static cycles_t exynos4_read_current_timer(void) static cycles_t exynos4_read_current_timer(void)
...@@ -231,14 +232,17 @@ static cycles_t exynos4_read_current_timer(void) ...@@ -231,14 +232,17 @@ static cycles_t exynos4_read_current_timer(void)
"cycles_t needs to move to 32-bit for ARM64 usage"); "cycles_t needs to move to 32-bit for ARM64 usage");
return exynos4_read_count_32(); return exynos4_read_count_32();
} }
#endif
static int __init exynos4_clocksource_init(void) static int __init exynos4_clocksource_init(void)
{ {
exynos4_mct_frc_start(); exynos4_mct_frc_start();
#if defined(CONFIG_ARM)
exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer;
exynos4_delay_timer.freq = clk_rate; exynos4_delay_timer.freq = clk_rate;
register_current_timer_delay(&exynos4_delay_timer); register_current_timer_delay(&exynos4_delay_timer);
#endif
if (clocksource_register_hz(&mct_frc, clk_rate)) if (clocksource_register_hz(&mct_frc, clk_rate))
panic("%s: can't register clocksource\n", mct_frc.name); panic("%s: can't register clocksource\n", mct_frc.name);
......
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