Commit f1ca7071 authored by Mario Limonciello's avatar Mario Limonciello Committed by Joerg Roedel

iommu/amd: Indicate whether DMA remap support is enabled

Bit 1 of the IVFS IVInfo field indicates that IOMMU has been used for
pre-boot DMA protection.

Export this capability to allow other places in the kernel to be able to
check for it on AMD systems.

Link: https://www.amd.com/system/files/TechDocs/48882_IOMMU.pdfReviewed-by: default avatarChristoph Hellwig <hch@lst.de>
Signed-off-by: default avatarMario Limonciello <mario.limonciello@amd.com>
Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Link: https://lore.kernel.org/r/ce7627fa1c596878ca6515dd9d4381a45b6ee38c.1650878781.git.robin.murphy@arm.comSigned-off-by: default avatarJoerg Roedel <jroedel@suse.de>
parent 86eaf4a5
...@@ -407,6 +407,7 @@ ...@@ -407,6 +407,7 @@
/* IOMMU IVINFO */ /* IOMMU IVINFO */
#define IOMMU_IVINFO_OFFSET 36 #define IOMMU_IVINFO_OFFSET 36
#define IOMMU_IVINFO_EFRSUP BIT(0) #define IOMMU_IVINFO_EFRSUP BIT(0)
#define IOMMU_IVINFO_DMA_REMAP BIT(1)
/* IOMMU Feature Reporting Field (for IVHD type 10h */ /* IOMMU Feature Reporting Field (for IVHD type 10h */
#define IOMMU_FEAT_GASUP_SHIFT 6 #define IOMMU_FEAT_GASUP_SHIFT 6
...@@ -449,6 +450,9 @@ extern struct irq_remap_table **irq_lookup_table; ...@@ -449,6 +450,9 @@ extern struct irq_remap_table **irq_lookup_table;
/* Interrupt remapping feature used? */ /* Interrupt remapping feature used? */
extern bool amd_iommu_irq_remap; extern bool amd_iommu_irq_remap;
/* IVRS indicates that pre-boot remapping was enabled */
extern bool amdr_ivrs_remap_support;
/* kmem_cache to get tables with 128 byte alignement */ /* kmem_cache to get tables with 128 byte alignement */
extern struct kmem_cache *amd_iommu_irq_cache; extern struct kmem_cache *amd_iommu_irq_cache;
......
...@@ -182,6 +182,7 @@ u32 amd_iommu_max_pasid __read_mostly = ~0; ...@@ -182,6 +182,7 @@ u32 amd_iommu_max_pasid __read_mostly = ~0;
bool amd_iommu_v2_present __read_mostly; bool amd_iommu_v2_present __read_mostly;
static bool amd_iommu_pc_present __read_mostly; static bool amd_iommu_pc_present __read_mostly;
bool amdr_ivrs_remap_support __read_mostly;
bool amd_iommu_force_isolation __read_mostly; bool amd_iommu_force_isolation __read_mostly;
...@@ -326,6 +327,8 @@ static void __init early_iommu_features_init(struct amd_iommu *iommu, ...@@ -326,6 +327,8 @@ static void __init early_iommu_features_init(struct amd_iommu *iommu,
{ {
if (amd_iommu_ivinfo & IOMMU_IVINFO_EFRSUP) if (amd_iommu_ivinfo & IOMMU_IVINFO_EFRSUP)
iommu->features = h->efr_reg; iommu->features = h->efr_reg;
if (amd_iommu_ivinfo & IOMMU_IVINFO_DMA_REMAP)
amdr_ivrs_remap_support = true;
} }
/* Access to l1 and l2 indexed register spaces */ /* Access to l1 and l2 indexed register spaces */
......
...@@ -2155,6 +2155,8 @@ static bool amd_iommu_capable(enum iommu_cap cap) ...@@ -2155,6 +2155,8 @@ static bool amd_iommu_capable(enum iommu_cap cap)
return (irq_remapping_enabled == 1); return (irq_remapping_enabled == 1);
case IOMMU_CAP_NOEXEC: case IOMMU_CAP_NOEXEC:
return false; return false;
case IOMMU_CAP_PRE_BOOT_PROTECTION:
return amdr_ivrs_remap_support;
default: default:
break; break;
} }
......
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