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Kirill Smelkov
linux
Commits
f26d8e7a
Commit
f26d8e7a
authored
Jul 21, 2020
by
Kevin Hilman
Browse files
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Merge tag 'amlogic-fixes' into v5.9/dt64
Amlogic fixes for v5.8-rc - misc DT fixes, and SoC ID fixes
parents
ea232b9c
54320dca
Changes
6
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6 changed files
with
37 additions
and
6 deletions
+37
-6
arch/arm/boot/dts/meson.dtsi
arch/arm/boot/dts/meson.dtsi
+1
-1
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
+1
-1
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
+1
-1
arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi
+24
-0
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
+5
-0
drivers/soc/amlogic/meson-gx-socinfo.c
drivers/soc/amlogic/meson-gx-socinfo.c
+5
-3
No files found.
arch/arm/boot/dts/meson.dtsi
View file @
f26d8e7a
...
@@ -11,7 +11,7 @@ / {
...
@@ -11,7 +11,7 @@ / {
#size-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&gic>;
interrupt-parent = <&gic>;
L2:
l2-
cache-controller@c4200000 {
L2: cache-controller@c4200000 {
compatible = "arm,pl310-cache";
compatible = "arm,pl310-cache";
reg = <0xc4200000 0x1000>;
reg = <0xc4200000 0x1000>;
cache-unified;
cache-unified;
...
...
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-libretech-ac.dts
View file @
f26d8e7a
...
@@ -10,7 +10,7 @@
...
@@ -10,7 +10,7 @@
#
include
<
dt
-
bindings
/
input
/
input
.
h
>
#
include
<
dt
-
bindings
/
input
/
input
.
h
>
#
include
<
dt
-
bindings
/
sound
/
meson
-
aiu
.
h
>
#
include
<
dt
-
bindings
/
sound
/
meson
-
aiu
.
h
>
#
include
"meson-gxl-s
9
05x.dtsi"
#
include
"meson-gxl-s
8
05x.dtsi"
/
{
/
{
compatible
=
"libretech,aml-s805x-ac"
,
"amlogic,s805x"
,
compatible
=
"libretech,aml-s805x-ac"
,
"amlogic,s805x"
,
...
...
arch/arm64/boot/dts/amlogic/meson-gxl-s805x-p241.dts
View file @
f26d8e7a
...
@@ -9,7 +9,7 @@
...
@@ -9,7 +9,7 @@
#
include
<
dt
-
bindings
/
input
/
input
.
h
>
#
include
<
dt
-
bindings
/
input
/
input
.
h
>
#
include
"meson-gxl-s
9
05x.dtsi"
#
include
"meson-gxl-s
8
05x.dtsi"
/
{
/
{
compatible
=
"amlogic,p241"
,
"amlogic,s805x"
,
"amlogic,meson-gxl"
;
compatible
=
"amlogic,p241"
,
"amlogic,s805x"
,
"amlogic,meson-gxl"
;
...
...
arch/arm64/boot/dts/amlogic/meson-gxl-s805x.dtsi
0 → 100644
View file @
f26d8e7a
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2020 BayLibre SAS
* Author: Neil Armstrong <narmstrong@baylibre.com>
*/
#include "meson-gxl-s905x.dtsi"
/ {
compatible = "amlogic,s805x", "amlogic,meson-gxl";
};
/* The S805X Package doesn't seem to handle the 744MHz OPP correctly */
&mali {
assigned-clocks = <&clkc CLKID_MALI_0_SEL>,
<&clkc CLKID_MALI_0>,
<&clkc CLKID_MALI>; /* Glitch free mux */
assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
<0>, /* Do Nothing */
<&clkc CLKID_MALI_0>;
assigned-clock-rates = <0>, /* Do Nothing */
<666666666>,
<0>; /* Do Nothing */
};
arch/arm64/boot/dts/amlogic/meson-gxl.dtsi
View file @
f26d8e7a
...
@@ -338,6 +338,11 @@ clkc: clock-controller {
...
@@ -338,6 +338,11 @@ clkc: clock-controller {
};
};
};
};
&hwrng {
clocks = <&clkc CLKID_RNG0>;
clock-names = "core";
};
&i2c_A {
&i2c_A {
clocks = <&clkc CLKID_I2C>;
clocks = <&clkc CLKID_I2C>;
};
};
...
...
drivers/soc/amlogic/meson-gx-socinfo.c
View file @
f26d8e7a
...
@@ -66,10 +66,12 @@ static const struct meson_gx_package_id {
...
@@ -66,10 +66,12 @@ static const struct meson_gx_package_id {
{
"A113D"
,
0x25
,
0x22
,
0xff
},
{
"A113D"
,
0x25
,
0x22
,
0xff
},
{
"S905D2"
,
0x28
,
0x10
,
0xf0
},
{
"S905D2"
,
0x28
,
0x10
,
0xf0
},
{
"S905X2"
,
0x28
,
0x40
,
0xf0
},
{
"S905X2"
,
0x28
,
0x40
,
0xf0
},
{
"S922X"
,
0x29
,
0x40
,
0xf0
},
{
"A311D"
,
0x29
,
0x10
,
0xf0
},
{
"A311D"
,
0x29
,
0x10
,
0xf0
},
{
"S905X3"
,
0x2b
,
0x5
,
0xf
},
{
"S922X"
,
0x29
,
0x40
,
0xf0
},
{
"S905D3"
,
0x2b
,
0xb0
,
0xf0
},
{
"S905D3"
,
0x2b
,
0x4
,
0xf5
},
{
"S905X3"
,
0x2b
,
0x5
,
0xf5
},
{
"S905X3"
,
0x2b
,
0x10
,
0x3f
},
{
"S905D3"
,
0x2b
,
0x30
,
0x3f
},
{
"A113L"
,
0x2c
,
0x0
,
0xf8
},
{
"A113L"
,
0x2c
,
0x0
,
0xf8
},
};
};
...
...
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