Commit f32bd778 authored by Paul Walmsley's avatar Paul Walmsley

ARM: OMAP2xxx: hwmod data: add HDQ/1-wire hwmod

Add the HDQ1W hwmod for all OMAP2xxx devices.

Assume that OMAP2xxx chips have the same HDQ idle handling bug
as OMAP3:

   http://www.spinics.net/lists/linux-omap/msg63576.html

and set the OCPIF_SWSUP_IDLE flag accordingly on the HDQ's OCP interface.
Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
parent 45a4bb06
...@@ -284,6 +284,23 @@ static struct omap_hwmod omap2420_msdi1_hwmod = { ...@@ -284,6 +284,23 @@ static struct omap_hwmod omap2420_msdi1_hwmod = {
.flags = HWMOD_16BIT_REG, .flags = HWMOD_16BIT_REG,
}; };
/* HDQ1W/1-wire */
static struct omap_hwmod omap2420_hdq1w_hwmod = {
.name = "hdq1w",
.mpu_irqs = omap2_hdq1w_mpu_irqs,
.main_clk = "hdq_fck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_HDQ_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT,
},
},
.class = &omap2_hdq1w_class,
};
/* /*
* interfaces * interfaces
*/ */
...@@ -491,6 +508,17 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__msdi1 = { ...@@ -491,6 +508,17 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__msdi1 = {
.user = OCP_USER_MPU | OCP_USER_SDMA, .user = OCP_USER_MPU | OCP_USER_SDMA,
}; };
/* l4_core -> hdq1w interface */
static struct omap_hwmod_ocp_if omap2420_l4_core__hdq1w = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2420_hdq1w_hwmod,
.clk = "hdq_ick",
.addr = omap2_hdq1w_addr_space,
.user = OCP_USER_MPU | OCP_USER_SDMA,
.flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
};
static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
&omap2xxx_l3_main__l4_core, &omap2xxx_l3_main__l4_core,
&omap2xxx_mpu__l3_main, &omap2xxx_mpu__l3_main,
...@@ -532,6 +560,7 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = { ...@@ -532,6 +560,7 @@ static struct omap_hwmod_ocp_if *omap2420_hwmod_ocp_ifs[] __initdata = {
&omap2420_l4_core__mcbsp1, &omap2420_l4_core__mcbsp1,
&omap2420_l4_core__mcbsp2, &omap2420_l4_core__mcbsp2,
&omap2420_l4_core__msdi1, &omap2420_l4_core__msdi1,
&omap2420_l4_core__hdq1w,
NULL, NULL,
}; };
......
...@@ -528,6 +528,23 @@ static struct omap_hwmod omap2430_mmc2_hwmod = { ...@@ -528,6 +528,23 @@ static struct omap_hwmod omap2430_mmc2_hwmod = {
.class = &omap2430_mmc_class, .class = &omap2430_mmc_class,
}; };
/* HDQ1W/1-wire */
static struct omap_hwmod omap2430_hdq1w_hwmod = {
.name = "hdq1w",
.mpu_irqs = omap2_hdq1w_mpu_irqs,
.main_clk = "hdq_fck",
.prcm = {
.omap2 = {
.module_offs = CORE_MOD,
.prcm_reg_id = 1,
.module_bit = OMAP24XX_EN_HDQ_SHIFT,
.idlest_reg_id = 1,
.idlest_idle_bit = OMAP24XX_ST_HDQ_SHIFT,
},
},
.class = &omap2_hdq1w_class,
};
/* /*
* interfaces * interfaces
*/ */
...@@ -838,6 +855,16 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = { ...@@ -838,6 +855,16 @@ static struct omap_hwmod_ocp_if omap2430_l4_core__mcbsp5 = {
.user = OCP_USER_MPU | OCP_USER_SDMA, .user = OCP_USER_MPU | OCP_USER_SDMA,
}; };
/* l4_core -> hdq1w */
static struct omap_hwmod_ocp_if omap2430_l4_core__hdq1w = {
.master = &omap2xxx_l4_core_hwmod,
.slave = &omap2430_hdq1w_hwmod,
.clk = "hdq_ick",
.addr = omap2_hdq1w_addr_space,
.user = OCP_USER_MPU | OCP_USER_SDMA,
.flags = OMAP_FIREWALL_L4 | OCPIF_SWSUP_IDLE,
};
static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
&omap2xxx_l3_main__l4_core, &omap2xxx_l3_main__l4_core,
&omap2xxx_mpu__l3_main, &omap2xxx_mpu__l3_main,
...@@ -886,6 +913,7 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = { ...@@ -886,6 +913,7 @@ static struct omap_hwmod_ocp_if *omap2430_hwmod_ocp_ifs[] __initdata = {
&omap2430_l4_core__mcbsp3, &omap2430_l4_core__mcbsp3,
&omap2430_l4_core__mcbsp4, &omap2430_l4_core__mcbsp4,
&omap2430_l4_core__mcbsp5, &omap2430_l4_core__mcbsp5,
&omap2430_l4_core__hdq1w,
NULL, NULL,
}; };
......
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