Commit f48c54a3 authored by Linus Torvalds's avatar Linus Torvalds

Merge bk://linux-dj.bkbits.net/agpgart

into ppc970.osdl.org:/home/torvalds/v2.6/linux
parents 5b1d3f39 36ab7956
...@@ -302,13 +302,6 @@ static int efficeon_remove_memory(struct agp_memory * mem, off_t pg_start, int t ...@@ -302,13 +302,6 @@ static int efficeon_remove_memory(struct agp_memory * mem, off_t pg_start, int t
return 0; return 0;
} }
/* GATT entry: (physical address | 1) */
static unsigned long efficeon_mask_memory(unsigned long addr, int type)
{
/* Memory type is ignored */
return addr | agp_bridge->driver->masks[0].mask;
}
struct agp_bridge_driver efficeon_driver = { struct agp_bridge_driver efficeon_driver = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
...@@ -319,7 +312,7 @@ struct agp_bridge_driver efficeon_driver = { ...@@ -319,7 +312,7 @@ struct agp_bridge_driver efficeon_driver = {
.fetch_size = efficeon_fetch_size, .fetch_size = efficeon_fetch_size,
.cleanup = efficeon_cleanup, .cleanup = efficeon_cleanup,
.tlb_flush = efficeon_tlbflush, .tlb_flush = efficeon_tlbflush,
.mask_memory = efficeon_mask_memory, .mask_memory = agp_generic_mask_memory,
.masks = efficeon_generic_masks, .masks = efficeon_generic_masks,
.agp_enable = agp_generic_enable, .agp_enable = agp_generic_enable,
.cache_flush = global_cache_flush, .cache_flush = global_cache_flush,
......
...@@ -487,9 +487,12 @@ static int __devinit agp_intelmch_probe(struct pci_dev *pdev, ...@@ -487,9 +487,12 @@ static int __devinit agp_intelmch_probe(struct pci_dev *pdev,
const struct pci_device_id *ent) const struct pci_device_id *ent)
{ {
struct agp_bridge_data *bridge; struct agp_bridge_data *bridge;
struct resource *r;
char *name = "(unknown)"; char *name = "(unknown)";
u8 cap_ptr = 0; u8 cap_ptr = 0;
struct resource *r;
if (!boot_cpu_has(X86_FEATURE_LM))
return -ENODEV;
cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP); cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
......
...@@ -93,10 +93,14 @@ static void sis_648_enable(u32 mode) ...@@ -93,10 +93,14 @@ static void sis_648_enable(u32 mode)
pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command); pci_write_config_dword(device, agp + PCI_AGP_COMMAND, command);
if(device->device == PCI_DEVICE_ID_SI_648) { /*
// weird: on 648 and 648fx chipsets any rate change in the target command register * Weird: on 648(fx) and 746(fx) chipsets any rate change in the target
// triggers a 5ms screwup during which the master cannot be configured * command register triggers a 5ms screwup during which the master
printk(KERN_INFO PFX "sis 648 agp fix - giving bridge time to recover\n"); * cannot be configured
*/
if (device->device == PCI_DEVICE_ID_SI_648 ||
device->device == PCI_DEVICE_ID_SI_746) {
printk(KERN_INFO PFX "SiS chipset with AGP problems detected. Giving bridge time to recover.\n");
set_current_state(TASK_UNINTERRUPTIBLE); set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout (1+(HZ*10)/1000); schedule_timeout (1+(HZ*10)/1000);
} }
...@@ -221,20 +225,27 @@ static struct agp_device_ids sis_agp_device_ids[] __devinitdata = ...@@ -221,20 +225,27 @@ static struct agp_device_ids sis_agp_device_ids[] __devinitdata =
static void __devinit sis_get_driver(struct agp_bridge_data *bridge) static void __devinit sis_get_driver(struct agp_bridge_data *bridge)
{ {
if (bridge->dev->device == PCI_DEVICE_ID_SI_648) { if (bridge->dev->device == PCI_DEVICE_ID_SI_648) {
if (agp_bridge->major_version == 3 && agp_bridge->minor_version < 5) { sis_driver.agp_enable=sis_648_enable;
sis_driver.agp_enable=sis_648_enable; if (agp_bridge->major_version == 3) {
} else { sis_driver.aperture_sizes = agp3_generic_sizes;
sis_driver.agp_enable = sis_648_enable; sis_driver.size_type = U16_APER_SIZE;
sis_driver.aperture_sizes = agp3_generic_sizes; sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES;
sis_driver.size_type = U16_APER_SIZE; sis_driver.configure = agp3_generic_configure;
sis_driver.num_aperture_sizes = AGP_GENERIC_SIZES_ENTRIES; sis_driver.fetch_size = agp3_generic_fetch_size;
sis_driver.configure = agp3_generic_configure; sis_driver.cleanup = agp3_generic_cleanup;
sis_driver.fetch_size = agp3_generic_fetch_size; sis_driver.tlb_flush = agp3_generic_tlbflush;
sis_driver.cleanup = agp3_generic_cleanup;
sis_driver.tlb_flush = agp3_generic_tlbflush;
} }
} }
if (bridge->dev->device == PCI_DEVICE_ID_SI_746) {
/*
* We don't know enough about the 746 to enable it properly.
* Though we do know that it needs the 'delay' hack to settle
* after changing modes.
*/
sis_driver.agp_enable=sis_648_enable;
}
} }
......
...@@ -160,23 +160,9 @@ static void via_tlbflush_agp3(struct agp_memory *mem) ...@@ -160,23 +160,9 @@ static void via_tlbflush_agp3(struct agp_memory *mem)
} }
static struct aper_size_info_16 via_generic_agp3_sizes[11] =
{
{ 4, 1024, 0, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4|1<<3|1<<2|1<<1|1<<0 },
{ 8, 2048, 1, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4|1<<3|1<<2|1<<1},
{ 16, 4096, 2, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4|1<<3|1<<2},
{ 32, 8192, 3, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4|1<<3},
{ 64, 16384, 4, 1<<11|1<<10|1<<9|1<<8|1<<5|1<<4},
{ 128, 32768, 5, 1<<11|1<<10|1<<9|1<<8|1<<5},
{ 256, 65536, 6, 1<<11|1<<10|1<<9|1<<8},
{ 512, 131072, 7, 1<<11|1<<10|1<<9},
{ 1024, 262144, 8, 1<<11|1<<10},
{ 2048, 524288, 9, 1<<11} /* 2GB <- Max supported */
};
struct agp_bridge_driver via_agp3_driver = { struct agp_bridge_driver via_agp3_driver = {
.owner = THIS_MODULE, .owner = THIS_MODULE,
.aperture_sizes = via_generic_agp3_sizes, .aperture_sizes = agp3_generic_sizes,
.size_type = U8_APER_SIZE, .size_type = U8_APER_SIZE,
.num_aperture_sizes = 10, .num_aperture_sizes = 10,
.configure = via_configure_agp3, .configure = via_configure_agp3,
......
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