Commit f4dda244 authored by Biju Das's avatar Biju Das Committed by Marc Kleine-Budde

dt-bindings: can: nxp,sja1000: Document RZ/N1 power-domains support

Document RZ/N1 power-domains support. Also update the example with
power-domains property.
Signed-off-by: default avatarBiju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/all/20220830164518.1381632-2-biju.das.jz@bp.renesas.comSigned-off-by: default avatarMarc Kleine-Budde <mkl@pengutronix.de>
parent 00784da3
...@@ -30,6 +30,9 @@ properties: ...@@ -30,6 +30,9 @@ properties:
clocks: clocks:
maxItems: 1 maxItems: 1
power-domains:
maxItems: 1
reg-io-width: reg-io-width:
$ref: /schemas/types.yaml#/definitions/uint32 $ref: /schemas/types.yaml#/definitions/uint32
description: I/O register width (in bytes) implemented by this device description: I/O register width (in bytes) implemented by this device
...@@ -105,6 +108,7 @@ allOf: ...@@ -105,6 +108,7 @@ allOf:
then: then:
required: required:
- clocks - clocks
- power-domains
unevaluatedProperties: false unevaluatedProperties: false
...@@ -129,4 +133,5 @@ examples: ...@@ -129,4 +133,5 @@ examples:
reg-io-width = <4>; reg-io-width = <4>;
interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sysctrl R9A06G032_HCLK_CAN0>; clocks = <&sysctrl R9A06G032_HCLK_CAN0>;
power-domains = <&sysctrl>;
}; };
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