Commit f51d7bf1 authored by Yangbo Lu's avatar Yangbo Lu Committed by David S. Miller

ptp_qoriq: fix overflow in ptp_qoriq_adjfine() u64 calcalation

Current calculation for diff of TMR_ADD register value may have
64-bit overflow in this code line, when long type scaled_ppm is
large.

adj *= scaled_ppm;

This patch is to resolve it by using mul_u64_u64_div_u64().
Signed-off-by: default avatarYangbo Lu <yangbo.lu@nxp.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 6ab4c311
...@@ -189,15 +189,16 @@ int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) ...@@ -189,15 +189,16 @@ int ptp_qoriq_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
tmr_add = ptp_qoriq->tmr_add; tmr_add = ptp_qoriq->tmr_add;
adj = tmr_add; adj = tmr_add;
/* calculate diff as adj*(scaled_ppm/65536)/1000000 /*
* and round() to the nearest integer * Calculate diff and round() to the nearest integer
*
* diff = adj * (ppb / 1000000000)
* = adj * scaled_ppm / 65536000000
*/ */
adj *= scaled_ppm; diff = mul_u64_u64_div_u64(adj, scaled_ppm, 32768000000);
diff = div_u64(adj, 8000000); diff = DIV64_U64_ROUND_UP(diff, 2);
diff = (diff >> 13) + ((diff >> 12) & 1);
tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff; tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
ptp_qoriq->write(&regs->ctrl_regs->tmr_add, tmr_add); ptp_qoriq->write(&regs->ctrl_regs->tmr_add, tmr_add);
return 0; return 0;
......
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