Commit f5a5a2f6 authored by Ingo Molnar's avatar Ingo Molnar

perf_counter: x86: Fix throttling

If counters are disabled globally when a perfcounter IRQ/NMI hits,
and if we throttle in that case, we'll promote the '0' value to
the next lapic IRQ and disable all perfcounters at that point,
permanently ...

Fix it.

[ Impact: fix hung perfcounters under load ]
Acked-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Corey Ashford <cjashfor@linux.vnet.ibm.com>
LKML-Reference: <new-submission>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent ec3232bd
......@@ -765,8 +765,13 @@ static int intel_pmu_handle_irq(struct pt_regs *regs, int nmi)
/*
* Restore - do not reenable when global enable is off or throttled:
*/
if (++cpuc->interrupts < PERFMON_MAX_INTERRUPTS)
if (cpuc->throttle_ctrl) {
if (++cpuc->interrupts < PERFMON_MAX_INTERRUPTS) {
intel_pmu_restore_all(cpuc->throttle_ctrl);
} else {
pr_info("CPU#%d: perfcounters: max interrupt rate exceeded! Throttle on.\n", smp_processor_id());
}
}
return ret;
}
......@@ -817,11 +822,16 @@ void perf_counter_unthrottle(void)
cpuc = &__get_cpu_var(cpu_hw_counters);
if (cpuc->interrupts >= PERFMON_MAX_INTERRUPTS) {
if (printk_ratelimit())
printk(KERN_WARNING "perfcounters: max interrupts exceeded!\n");
pr_info("CPU#%d: perfcounters: throttle off.\n", smp_processor_id());
/*
* Clear them before re-enabling irqs/NMIs again:
*/
cpuc->interrupts = 0;
hw_perf_restore(cpuc->throttle_ctrl);
}
} else {
cpuc->interrupts = 0;
}
}
void smp_perf_counter_interrupt(struct pt_regs *regs)
......
Markdown is supported
0%
or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment