Commit f6b5dd40 authored by Andrey Gusakov's avatar Andrey Gusakov Committed by Simon Horman

ARM: shmobile: r8a7790: add MLB+ clock

Add MLB+ clock to R8A7790 device tree.
Signed-off-by: default avatarAndrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: default avatarSergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent 09ee81da
...@@ -1149,16 +1149,17 @@ R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0 ...@@ -1149,16 +1149,17 @@ R8A7790_CLK_LVDS1 R8A7790_CLK_LVDS0
mstp8_clks: mstp8_clks@e6150990 { mstp8_clks: mstp8_clks@e6150990 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>; reg = <0 0xe6150990 0 4>, <0 0xe61509a0 0 4>;
clocks = <&zg_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>, <&p_clk>, clocks = <&hp_clk>, <&zg_clk>, <&zg_clk>, <&zg_clk>,
<&zs_clk>, <&zs_clk>; <&zg_clk>, <&p_clk>, <&zs_clk>, <&zs_clk>;
#clock-cells = <1>; #clock-cells = <1>;
clock-indices = < clock-indices = <
R8A7790_CLK_VIN3 R8A7790_CLK_VIN2 R8A7790_CLK_VIN1 R8A7790_CLK_MLB R8A7790_CLK_VIN3 R8A7790_CLK_VIN2
R8A7790_CLK_VIN0 R8A7790_CLK_ETHER R8A7790_CLK_SATA1 R8A7790_CLK_VIN1 R8A7790_CLK_VIN0 R8A7790_CLK_ETHER
R8A7790_CLK_SATA0 R8A7790_CLK_SATA1 R8A7790_CLK_SATA0
>; >;
clock-output-names = clock-output-names =
"vin3", "vin2", "vin1", "vin0", "ether", "sata1", "sata0"; "mlb", "vin3", "vin2", "vin1", "vin0", "ether",
"sata1", "sata0";
}; };
mstp9_clks: mstp9_clks@e6150994 { mstp9_clks: mstp9_clks@e6150994 {
compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks"; compatible = "renesas,r8a7790-mstp-clocks", "renesas,cpg-mstp-clocks";
......
...@@ -97,6 +97,7 @@ ...@@ -97,6 +97,7 @@
#define R8A7790_CLK_LVDS0 26 #define R8A7790_CLK_LVDS0 26
/* MSTP8 */ /* MSTP8 */
#define R8A7790_CLK_MLB 2
#define R8A7790_CLK_VIN3 8 #define R8A7790_CLK_VIN3 8
#define R8A7790_CLK_VIN2 9 #define R8A7790_CLK_VIN2 9
#define R8A7790_CLK_VIN1 10 #define R8A7790_CLK_VIN1 10
......
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