Commit f6f2421c authored by Lars-Peter Clausen's avatar Lars-Peter Clausen Committed by Vinod Koul

dmaengine: pl330: Merge dma_pl330_dmac and pl330_dmac structs

Both the dma_pl330_dmac and the pl330_dmac struct have the same lifetime and the
separation of them is a relict of this having been two different drivers in the
past. Merging them into one struct makes the code a bit simpler as it for
example allows to remove the pointers going back and forth between the two
structs.

While we are at it also directly embed the pl330_info struct into the
pl330_dmac struct as this allows to remove some more redundant fields.
Signed-off-by: default avatarLars-Peter Clausen <lars@metafoo.de>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
parent fbbcd9be
......@@ -282,20 +282,6 @@ struct pl330_config {
u32 irq_ns;
};
/* Handle to the DMAC provided to the PL330 core */
struct pl330_info {
/* Owning device */
struct device *dev;
/* Size of MicroCode buffers for each channel. */
unsigned mcbufsz;
/* ioremap'ed address of PL330 registers. */
void __iomem *base;
/* PL330 core data, Client must not touch it. */
void *pl330_data;
/* Populated by the PL330 core driver during pl330_add */
struct pl330_config pcfg;
};
/**
* Request Configuration.
* The PL330 core does not modify this and uses the last
......@@ -426,30 +412,6 @@ enum pl330_dmac_state {
DYING,
};
/* A DMAC */
struct pl330_dmac {
spinlock_t lock;
/* Holds list of reqs with due callbacks */
struct list_head req_done;
/* Pointer to platform specific stuff */
struct pl330_info *pinfo;
/* Maximum possible events/irqs */
int events[32];
/* BUS address of MicroCode buffer */
dma_addr_t mcode_bus;
/* CPU address of MicroCode buffer */
void *mcode_cpu;
/* List of all Channel threads */
struct pl330_thread *channels;
/* Pointer to the MANAGER thread */
struct pl330_thread *manager;
/* To handle bad news in interrupt */
struct tasklet_struct tasks;
struct _pl330_tbd dmac_tbd;
/* State of DMAC operation */
enum pl330_dmac_state state;
};
enum desc_status {
/* In the DMAC pool */
FREE,
......@@ -490,7 +452,7 @@ struct dma_pl330_chan {
* As the parent, this DMAC also provides descriptors
* to the channel.
*/
struct dma_pl330_dmac *dmac;
struct pl330_dmac *dmac;
/* To protect channel manipulation */
spinlock_t lock;
......@@ -510,9 +472,7 @@ struct dma_pl330_chan {
bool cyclic;
};
struct dma_pl330_dmac {
struct pl330_info pif;
struct pl330_dmac {
/* DMA-Engine Device */
struct dma_device ddma;
......@@ -524,6 +484,32 @@ struct dma_pl330_dmac {
/* To protect desc_pool manipulation */
spinlock_t pool_lock;
/* Size of MicroCode buffers for each channel. */
unsigned mcbufsz;
/* ioremap'ed address of PL330 registers. */
void __iomem *base;
/* Populated by the PL330 core driver during pl330_add */
struct pl330_config pcfg;
spinlock_t lock;
/* Maximum possible events/irqs */
int events[32];
/* BUS address of MicroCode buffer */
dma_addr_t mcode_bus;
/* CPU address of MicroCode buffer */
void *mcode_cpu;
/* List of all Channel threads */
struct pl330_thread *channels;
/* Pointer to the MANAGER thread */
struct pl330_thread *manager;
/* To handle bad news in interrupt */
struct tasklet_struct tasks;
struct _pl330_tbd dmac_tbd;
/* State of DMAC operation */
enum pl330_dmac_state state;
/* Holds list of reqs with due callbacks */
struct list_head req_done;
/* Peripheral channels connected to this DMAC */
unsigned int num_peripherals;
struct dma_pl330_chan *peripherals; /* keep at end */
......@@ -568,9 +554,7 @@ static inline bool is_manager(struct pl330_thread *thrd)
/* If manager of the thread is in Non-Secure mode */
static inline bool _manager_ns(struct pl330_thread *thrd)
{
struct pl330_dmac *pl330 = thrd->dmac;
return (pl330->pinfo->pcfg.mode & DMAC_MODE_NS) ? true : false;
return (thrd->dmac->pcfg.mode & DMAC_MODE_NS) ? true : false;
}
static inline u32 get_revision(u32 periph_id)
......@@ -928,7 +912,7 @@ static inline u32 _emit_GO(unsigned dry_run, u8 buf[],
/* Returns Time-Out */
static bool _until_dmac_idle(struct pl330_thread *thrd)
{
void __iomem *regs = thrd->dmac->pinfo->base;
void __iomem *regs = thrd->dmac->base;
unsigned long loops = msecs_to_loops(5);
do {
......@@ -948,7 +932,7 @@ static bool _until_dmac_idle(struct pl330_thread *thrd)
static inline void _execute_DBGINSN(struct pl330_thread *thrd,
u8 insn[], bool as_manager)
{
void __iomem *regs = thrd->dmac->pinfo->base;
void __iomem *regs = thrd->dmac->base;
u32 val;
val = (insn[0] << 16) | (insn[1] << 24);
......@@ -963,7 +947,7 @@ static inline void _execute_DBGINSN(struct pl330_thread *thrd,
/* If timed out due to halted state-machine */
if (_until_dmac_idle(thrd)) {
dev_err(thrd->dmac->pinfo->dev, "DMAC halted!\n");
dev_err(thrd->dmac->ddma.dev, "DMAC halted!\n");
return;
}
......@@ -988,7 +972,7 @@ static void mark_free(struct pl330_thread *thrd, int idx)
static inline u32 _state(struct pl330_thread *thrd)
{
void __iomem *regs = thrd->dmac->pinfo->base;
void __iomem *regs = thrd->dmac->base;
u32 val;
if (is_manager(thrd))
......@@ -1046,7 +1030,7 @@ static inline u32 _state(struct pl330_thread *thrd)
static void _stop(struct pl330_thread *thrd)
{
void __iomem *regs = thrd->dmac->pinfo->base;
void __iomem *regs = thrd->dmac->base;
u8 insn[6] = {0, 0, 0, 0, 0, 0};
if (_state(thrd) == PL330_STATE_FAULT_COMPLETING)
......@@ -1069,7 +1053,7 @@ static void _stop(struct pl330_thread *thrd)
/* Start doing req 'idx' of thread 'thrd' */
static bool _trigger(struct pl330_thread *thrd)
{
void __iomem *regs = thrd->dmac->pinfo->base;
void __iomem *regs = thrd->dmac->base;
struct _pl330_req *req;
struct pl330_req *r;
struct _arg_GO go;
......@@ -1107,7 +1091,7 @@ static bool _trigger(struct pl330_thread *thrd)
/* See 'Abort Sources' point-4 at Page 2-25 */
if (_manager_ns(thrd) && !ns)
dev_info(thrd->dmac->pinfo->dev, "%s:%d Recipe for ABORT!\n",
dev_info(thrd->dmac->ddma.dev, "%s:%d Recipe for ABORT!\n",
__func__, __LINE__);
go.chan = thrd->id;
......@@ -1421,8 +1405,7 @@ static inline u32 _prepare_ccr(const struct pl330_reqcfg *rqc)
*/
static int pl330_submit_req(struct pl330_thread *thrd, struct pl330_req *r)
{
struct pl330_dmac *pl330;
struct pl330_info *pi;
struct pl330_dmac *pl330 = thrd->dmac;
struct _xfer_spec xs;
unsigned long flags;
void __iomem *regs;
......@@ -1434,20 +1417,18 @@ static int pl330_submit_req(struct pl330_thread *thrd, struct pl330_req *r)
if (!r || !thrd || thrd->free)
return -EINVAL;
pl330 = thrd->dmac;
pi = pl330->pinfo;
regs = pi->base;
regs = thrd->dmac->base;
if (pl330->state == DYING
|| pl330->dmac_tbd.reset_chan & (1 << thrd->id)) {
dev_info(thrd->dmac->pinfo->dev, "%s:%d\n",
dev_info(thrd->dmac->ddma.dev, "%s:%d\n",
__func__, __LINE__);
return -EAGAIN;
}
/* If request for non-existing peripheral */
if (r->rqtype != DMA_MEM_TO_MEM && r->peri >= pi->pcfg.num_peri) {
dev_info(thrd->dmac->pinfo->dev,
if (r->rqtype != DMA_MEM_TO_MEM && r->peri >= pl330->pcfg.num_peri) {
dev_info(thrd->dmac->ddma.dev,
"%s:%d Invalid peripheral(%u)!\n",
__func__, __LINE__, r->peri);
return -EINVAL;
......@@ -1484,9 +1465,8 @@ static int pl330_submit_req(struct pl330_thread *thrd, struct pl330_req *r)
if (ret < 0)
goto xfer_exit;
if (ret > pi->mcbufsz / 2) {
dev_info(thrd->dmac->pinfo->dev,
"%s:%d Trying increasing mcbufsz\n",
if (ret > pl330->mcbufsz / 2) {
dev_info(pl330->ddma.dev, "%s:%d Trying increasing mcbufsz\n",
__func__, __LINE__);
ret = -ENOMEM;
goto xfer_exit;
......@@ -1527,7 +1507,6 @@ static void dma_pl330_rqcb(struct pl330_req *req, enum pl330_op_err err)
static void pl330_dotask(unsigned long data)
{
struct pl330_dmac *pl330 = (struct pl330_dmac *) data;
struct pl330_info *pi = pl330->pinfo;
unsigned long flags;
int i;
......@@ -1545,16 +1524,16 @@ static void pl330_dotask(unsigned long data)
if (pl330->dmac_tbd.reset_mngr) {
_stop(pl330->manager);
/* Reset all channels */
pl330->dmac_tbd.reset_chan = (1 << pi->pcfg.num_chan) - 1;
pl330->dmac_tbd.reset_chan = (1 << pl330->pcfg.num_chan) - 1;
/* Clear the reset flag */
pl330->dmac_tbd.reset_mngr = false;
}
for (i = 0; i < pi->pcfg.num_chan; i++) {
for (i = 0; i < pl330->pcfg.num_chan; i++) {
if (pl330->dmac_tbd.reset_chan & (1 << i)) {
struct pl330_thread *thrd = &pl330->channels[i];
void __iomem *regs = pi->base;
void __iomem *regs = pl330->base;
enum pl330_op_err err;
_stop(thrd);
......@@ -1585,20 +1564,15 @@ static void pl330_dotask(unsigned long data)
}
/* Returns 1 if state was updated, 0 otherwise */
static int pl330_update(const struct pl330_info *pi)
static int pl330_update(struct pl330_dmac *pl330)
{
struct pl330_req *rqdone, *tmp;
struct pl330_dmac *pl330;
unsigned long flags;
void __iomem *regs;
u32 val;
int id, ev, ret = 0;
if (!pi || !pi->pl330_data)
return 0;
regs = pi->base;
pl330 = pi->pl330_data;
regs = pl330->base;
spin_lock_irqsave(&pl330->lock, flags);
......@@ -1608,13 +1582,13 @@ static int pl330_update(const struct pl330_info *pi)
else
pl330->dmac_tbd.reset_mngr = false;
val = readl(regs + FSC) & ((1 << pi->pcfg.num_chan) - 1);
val = readl(regs + FSC) & ((1 << pl330->pcfg.num_chan) - 1);
pl330->dmac_tbd.reset_chan |= val;
if (val) {
int i = 0;
while (i < pi->pcfg.num_chan) {
while (i < pl330->pcfg.num_chan) {
if (val & (1 << i)) {
dev_info(pi->dev,
dev_info(pl330->ddma.dev,
"Reset Channel-%d\t CS-%x FTC-%x\n",
i, readl(regs + CS(i)),
readl(regs + FTC(i)));
......@@ -1626,15 +1600,16 @@ static int pl330_update(const struct pl330_info *pi)
/* Check which event happened i.e, thread notified */
val = readl(regs + ES);
if (pi->pcfg.num_events < 32
&& val & ~((1 << pi->pcfg.num_events) - 1)) {
if (pl330->pcfg.num_events < 32
&& val & ~((1 << pl330->pcfg.num_events) - 1)) {
pl330->dmac_tbd.reset_dmac = true;
dev_err(pi->dev, "%s:%d Unexpected!\n", __func__, __LINE__);
dev_err(pl330->ddma.dev, "%s:%d Unexpected!\n", __func__,
__LINE__);
ret = 1;
goto updt_exit;
}
for (ev = 0; ev < pi->pcfg.num_events; ev++) {
for (ev = 0; ev < pl330->pcfg.num_events; ev++) {
if (val & (1 << ev)) { /* Event occurred */
struct pl330_thread *thrd;
u32 inten = readl(regs + INTEN);
......@@ -1744,10 +1719,9 @@ static int pl330_chan_ctrl(struct pl330_thread *thrd, enum pl330_chan_op op)
static inline int _alloc_event(struct pl330_thread *thrd)
{
struct pl330_dmac *pl330 = thrd->dmac;
struct pl330_info *pi = pl330->pinfo;
int ev;
for (ev = 0; ev < pi->pcfg.num_events; ev++)
for (ev = 0; ev < pl330->pcfg.num_events; ev++)
if (pl330->events[ev] == -1) {
pl330->events[ev] = thrd->id;
return ev;
......@@ -1756,37 +1730,31 @@ static inline int _alloc_event(struct pl330_thread *thrd)
return -1;
}
static bool _chan_ns(const struct pl330_info *pi, int i)
static bool _chan_ns(const struct pl330_dmac *pl330, int i)
{
return pi->pcfg.irq_ns & (1 << i);
return pl330->pcfg.irq_ns & (1 << i);
}
/* Upon success, returns IdentityToken for the
* allocated channel, NULL otherwise.
*/
static struct pl330_thread *pl330_request_channel(const struct pl330_info *pi)
static struct pl330_thread *pl330_request_channel(struct pl330_dmac *pl330)
{
struct pl330_thread *thrd = NULL;
struct pl330_dmac *pl330;
unsigned long flags;
int chans, i;
if (!pi || !pi->pl330_data)
return NULL;
pl330 = pi->pl330_data;
if (pl330->state == DYING)
return NULL;
chans = pi->pcfg.num_chan;
chans = pl330->pcfg.num_chan;
spin_lock_irqsave(&pl330->lock, flags);
for (i = 0; i < chans; i++) {
thrd = &pl330->channels[i];
if ((thrd->free) && (!_manager_ns(thrd) ||
_chan_ns(pi, i))) {
_chan_ns(pl330, i))) {
thrd->ev = _alloc_event(thrd);
if (thrd->ev >= 0) {
thrd->free = false;
......@@ -1810,10 +1778,9 @@ static struct pl330_thread *pl330_request_channel(const struct pl330_info *pi)
static inline void _free_event(struct pl330_thread *thrd, int ev)
{
struct pl330_dmac *pl330 = thrd->dmac;
struct pl330_info *pi = pl330->pinfo;
/* If the event is valid and was held by the thread */
if (ev >= 0 && ev < pi->pcfg.num_events
if (ev >= 0 && ev < pl330->pcfg.num_events
&& pl330->events[ev] == thrd->id)
pl330->events[ev] = -1;
}
......@@ -1842,72 +1809,70 @@ static void pl330_release_channel(struct pl330_thread *thrd)
/* Initialize the structure for PL330 configuration, that can be used
* by the client driver the make best use of the DMAC
*/
static void read_dmac_config(struct pl330_info *pi)
static void read_dmac_config(struct pl330_dmac *pl330)
{
void __iomem *regs = pi->base;
void __iomem *regs = pl330->base;
u32 val;
val = readl(regs + CRD) >> CRD_DATA_WIDTH_SHIFT;
val &= CRD_DATA_WIDTH_MASK;
pi->pcfg.data_bus_width = 8 * (1 << val);
pl330->pcfg.data_bus_width = 8 * (1 << val);
val = readl(regs + CRD) >> CRD_DATA_BUFF_SHIFT;
val &= CRD_DATA_BUFF_MASK;
pi->pcfg.data_buf_dep = val + 1;
pl330->pcfg.data_buf_dep = val + 1;
val = readl(regs + CR0) >> CR0_NUM_CHANS_SHIFT;
val &= CR0_NUM_CHANS_MASK;
val += 1;
pi->pcfg.num_chan = val;
pl330->pcfg.num_chan = val;
val = readl(regs + CR0);
if (val & CR0_PERIPH_REQ_SET) {
val = (val >> CR0_NUM_PERIPH_SHIFT) & CR0_NUM_PERIPH_MASK;
val += 1;
pi->pcfg.num_peri = val;
pi->pcfg.peri_ns = readl(regs + CR4);
pl330->pcfg.num_peri = val;
pl330->pcfg.peri_ns = readl(regs + CR4);
} else {
pi->pcfg.num_peri = 0;
pl330->pcfg.num_peri = 0;
}
val = readl(regs + CR0);
if (val & CR0_BOOT_MAN_NS)
pi->pcfg.mode |= DMAC_MODE_NS;
pl330->pcfg.mode |= DMAC_MODE_NS;
else
pi->pcfg.mode &= ~DMAC_MODE_NS;
pl330->pcfg.mode &= ~DMAC_MODE_NS;
val = readl(regs + CR0) >> CR0_NUM_EVENTS_SHIFT;
val &= CR0_NUM_EVENTS_MASK;
val += 1;
pi->pcfg.num_events = val;
pl330->pcfg.num_events = val;
pi->pcfg.irq_ns = readl(regs + CR3);
pl330->pcfg.irq_ns = readl(regs + CR3);
}
static inline void _reset_thread(struct pl330_thread *thrd)
{
struct pl330_dmac *pl330 = thrd->dmac;
struct pl330_info *pi = pl330->pinfo;
thrd->req[0].mc_cpu = pl330->mcode_cpu
+ (thrd->id * pi->mcbufsz);
+ (thrd->id * pl330->mcbufsz);
thrd->req[0].mc_bus = pl330->mcode_bus
+ (thrd->id * pi->mcbufsz);
+ (thrd->id * pl330->mcbufsz);
thrd->req[0].r = NULL;
mark_free(thrd, 0);
thrd->req[1].mc_cpu = thrd->req[0].mc_cpu
+ pi->mcbufsz / 2;
+ pl330->mcbufsz / 2;
thrd->req[1].mc_bus = thrd->req[0].mc_bus
+ pi->mcbufsz / 2;
+ pl330->mcbufsz / 2;
thrd->req[1].r = NULL;
mark_free(thrd, 1);
}
static int dmac_alloc_threads(struct pl330_dmac *pl330)
{
struct pl330_info *pi = pl330->pinfo;
int chans = pi->pcfg.num_chan;
int chans = pl330->pcfg.num_chan;
struct pl330_thread *thrd;
int i;
......@@ -1938,29 +1903,28 @@ static int dmac_alloc_threads(struct pl330_dmac *pl330)
static int dmac_alloc_resources(struct pl330_dmac *pl330)
{
struct pl330_info *pi = pl330->pinfo;
int chans = pi->pcfg.num_chan;
int chans = pl330->pcfg.num_chan;
int ret;
/*
* Alloc MicroCode buffer for 'chans' Channel threads.
* A channel's buffer offset is (Channel_Id * MCODE_BUFF_PERCHAN)
*/
pl330->mcode_cpu = dma_alloc_coherent(pi->dev,
chans * pi->mcbufsz,
pl330->mcode_cpu = dma_alloc_coherent(pl330->ddma.dev,
chans * pl330->mcbufsz,
&pl330->mcode_bus, GFP_KERNEL);
if (!pl330->mcode_cpu) {
dev_err(pi->dev, "%s:%d Can't allocate memory!\n",
dev_err(pl330->ddma.dev, "%s:%d Can't allocate memory!\n",
__func__, __LINE__);
return -ENOMEM;
}
ret = dmac_alloc_threads(pl330);
if (ret) {
dev_err(pi->dev, "%s:%d Can't to create channels for DMAC!\n",
dev_err(pl330->ddma.dev, "%s:%d Can't to create channels for DMAC!\n",
__func__, __LINE__);
dma_free_coherent(pi->dev,
chans * pi->mcbufsz,
dma_free_coherent(pl330->ddma.dev,
chans * pl330->mcbufsz,
pl330->mcode_cpu, pl330->mcode_bus);
return ret;
}
......@@ -1968,64 +1932,45 @@ static int dmac_alloc_resources(struct pl330_dmac *pl330)
return 0;
}
static int pl330_add(struct pl330_info *pi)
static int pl330_add(struct pl330_dmac *pl330)
{
struct pl330_dmac *pl330;
void __iomem *regs;
int i, ret;
if (!pi || !pi->dev)
return -EINVAL;
/* If already added */
if (pi->pl330_data)
return -EINVAL;
regs = pi->base;
regs = pl330->base;
/* Check if we can handle this DMAC */
if ((pi->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) {
dev_err(pi->dev, "PERIPH_ID 0x%x !\n", pi->pcfg.periph_id);
if ((pl330->pcfg.periph_id & 0xfffff) != PERIPH_ID_VAL) {
dev_err(pl330->ddma.dev, "PERIPH_ID 0x%x !\n",
pl330->pcfg.periph_id);
return -EINVAL;
}
/* Read the configuration of the DMAC */
read_dmac_config(pi);
read_dmac_config(pl330);
if (pi->pcfg.num_events == 0) {
dev_err(pi->dev, "%s:%d Can't work without events!\n",
if (pl330->pcfg.num_events == 0) {
dev_err(pl330->ddma.dev, "%s:%d Can't work without events!\n",
__func__, __LINE__);
return -EINVAL;
}
pl330 = kzalloc(sizeof(*pl330), GFP_KERNEL);
if (!pl330) {
dev_err(pi->dev, "%s:%d Can't allocate memory!\n",
__func__, __LINE__);
return -ENOMEM;
}
/* Assign the info structure and private data */
pl330->pinfo = pi;
pi->pl330_data = pl330;
spin_lock_init(&pl330->lock);
INIT_LIST_HEAD(&pl330->req_done);
/* Use default MC buffer size if not provided */
if (!pi->mcbufsz)
pi->mcbufsz = MCODE_BUFF_PER_REQ * 2;
if (!pl330->mcbufsz)
pl330->mcbufsz = MCODE_BUFF_PER_REQ * 2;
/* Mark all events as free */
for (i = 0; i < pi->pcfg.num_events; i++)
for (i = 0; i < pl330->pcfg.num_events; i++)
pl330->events[i] = -1;
/* Allocate resources needed by the DMAC */
ret = dmac_alloc_resources(pl330);
if (ret) {
dev_err(pi->dev, "Unable to create channels for DMAC\n");
kfree(pl330);
dev_err(pl330->ddma.dev, "Unable to create channels for DMAC\n");
return ret;
}
......@@ -2038,13 +1983,11 @@ static int pl330_add(struct pl330_info *pi)
static int dmac_free_threads(struct pl330_dmac *pl330)
{
struct pl330_info *pi = pl330->pinfo;
int chans = pi->pcfg.num_chan;
struct pl330_thread *thrd;
int i;
/* Release Channel threads */
for (i = 0; i < chans; i++) {
for (i = 0; i < pl330->pcfg.num_chan; i++) {
thrd = &pl330->channels[i];
pl330_release_channel(thrd);
}
......@@ -2055,35 +1998,18 @@ static int dmac_free_threads(struct pl330_dmac *pl330)
return 0;
}
static void dmac_free_resources(struct pl330_dmac *pl330)
{
struct pl330_info *pi = pl330->pinfo;
int chans = pi->pcfg.num_chan;
dmac_free_threads(pl330);
dma_free_coherent(pi->dev, chans * pi->mcbufsz,
pl330->mcode_cpu, pl330->mcode_bus);
}
static void pl330_del(struct pl330_info *pi)
static void pl330_del(struct pl330_dmac *pl330)
{
struct pl330_dmac *pl330;
if (!pi || !pi->pl330_data)
return;
pl330 = pi->pl330_data;
pl330->state = UNINIT;
tasklet_kill(&pl330->tasks);
/* Free DMAC resources */
dmac_free_resources(pl330);
dmac_free_threads(pl330);
kfree(pl330);
pi->pl330_data = NULL;
dma_free_coherent(pl330->ddma.dev,
pl330->pcfg.num_chan * pl330->mcbufsz, pl330->mcode_cpu,
pl330->mcode_bus);
}
/* forward declaration */
......@@ -2124,7 +2050,7 @@ static inline void fill_queue(struct dma_pl330_chan *pch)
} else {
/* Unacceptable request */
desc->status = DONE;
dev_err(pch->dmac->pif.dev, "%s:%d Bad Desc(%d)\n",
dev_err(pch->dmac->ddma.dev, "%s:%d Bad Desc(%d)\n",
__func__, __LINE__, desc->txd.cookie);
tasklet_schedule(&pch->task);
}
......@@ -2198,23 +2124,26 @@ static struct dma_chan *of_dma_pl330_xlate(struct of_phandle_args *dma_spec,
struct of_dma *ofdma)
{
int count = dma_spec->args_count;
struct dma_pl330_dmac *pdmac = ofdma->of_dma_data;
struct pl330_dmac *pl330 = ofdma->of_dma_data;
unsigned int chan_id;
if (!pl330)
return NULL;
if (count != 1)
return NULL;
chan_id = dma_spec->args[0];
if (chan_id >= pdmac->num_peripherals)
if (chan_id >= pl330->num_peripherals)
return NULL;
return dma_get_slave_channel(&pdmac->peripherals[chan_id].chan);
return dma_get_slave_channel(&pl330->peripherals[chan_id].chan);
}
static int pl330_alloc_chan_resources(struct dma_chan *chan)
{
struct dma_pl330_chan *pch = to_pchan(chan);
struct dma_pl330_dmac *pdmac = pch->dmac;
struct pl330_dmac *pl330 = pch->dmac;
unsigned long flags;
spin_lock_irqsave(&pch->lock, flags);
......@@ -2222,7 +2151,7 @@ static int pl330_alloc_chan_resources(struct dma_chan *chan)
dma_cookie_init(chan);
pch->cyclic = false;
pch->thread = pl330_request_channel(&pdmac->pif);
pch->thread = pl330_request_channel(pl330);
if (!pch->thread) {
spin_unlock_irqrestore(&pch->lock, flags);
return -ENOMEM;
......@@ -2240,7 +2169,7 @@ static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, unsigned
struct dma_pl330_chan *pch = to_pchan(chan);
struct dma_pl330_desc *desc;
unsigned long flags;
struct dma_pl330_dmac *pdmac = pch->dmac;
struct pl330_dmac *pl330 = pch->dmac;
struct dma_slave_config *slave_config;
LIST_HEAD(list);
......@@ -2267,9 +2196,9 @@ static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, unsigned
dma_cookie_complete(&desc->txd);
}
list_splice_tail_init(&pch->submitted_list, &pdmac->desc_pool);
list_splice_tail_init(&pch->work_list, &pdmac->desc_pool);
list_splice_tail_init(&pch->completed_list, &pdmac->desc_pool);
list_splice_tail_init(&pch->submitted_list, &pl330->desc_pool);
list_splice_tail_init(&pch->work_list, &pl330->desc_pool);
list_splice_tail_init(&pch->completed_list, &pl330->desc_pool);
spin_unlock_irqrestore(&pch->lock, flags);
break;
case DMA_SLAVE_CONFIG:
......@@ -2292,7 +2221,7 @@ static int pl330_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, unsigned
}
break;
default:
dev_err(pch->dmac->pif.dev, "Not supported command.\n");
dev_err(pch->dmac->ddma.dev, "Not supported command.\n");
return -ENXIO;
}
......@@ -2383,44 +2312,37 @@ static inline void _init_desc(struct dma_pl330_desc *desc)
}
/* Returns the number of descriptors added to the DMAC pool */
static int add_desc(struct dma_pl330_dmac *pdmac, gfp_t flg, int count)
static int add_desc(struct pl330_dmac *pl330, gfp_t flg, int count)
{
struct dma_pl330_desc *desc;
unsigned long flags;
int i;
if (!pdmac)
return 0;
desc = kcalloc(count, sizeof(*desc), flg);
if (!desc)
return 0;
spin_lock_irqsave(&pdmac->pool_lock, flags);
spin_lock_irqsave(&pl330->pool_lock, flags);
for (i = 0; i < count; i++) {
_init_desc(&desc[i]);
list_add_tail(&desc[i].node, &pdmac->desc_pool);
list_add_tail(&desc[i].node, &pl330->desc_pool);
}
spin_unlock_irqrestore(&pdmac->pool_lock, flags);
spin_unlock_irqrestore(&pl330->pool_lock, flags);
return count;
}
static struct dma_pl330_desc *
pluck_desc(struct dma_pl330_dmac *pdmac)
static struct dma_pl330_desc *pluck_desc(struct pl330_dmac *pl330)
{
struct dma_pl330_desc *desc = NULL;
unsigned long flags;
if (!pdmac)
return NULL;
spin_lock_irqsave(&pl330->pool_lock, flags);
spin_lock_irqsave(&pdmac->pool_lock, flags);
if (!list_empty(&pdmac->desc_pool)) {
desc = list_entry(pdmac->desc_pool.next,
if (!list_empty(&pl330->desc_pool)) {
desc = list_entry(pl330->desc_pool.next,
struct dma_pl330_desc, node);
list_del_init(&desc->node);
......@@ -2429,29 +2351,29 @@ pluck_desc(struct dma_pl330_dmac *pdmac)
desc->txd.callback = NULL;
}
spin_unlock_irqrestore(&pdmac->pool_lock, flags);
spin_unlock_irqrestore(&pl330->pool_lock, flags);
return desc;
}
static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
{
struct dma_pl330_dmac *pdmac = pch->dmac;
struct pl330_dmac *pl330 = pch->dmac;
u8 *peri_id = pch->chan.private;
struct dma_pl330_desc *desc;
/* Pluck one desc from the pool of DMAC */
desc = pluck_desc(pdmac);
desc = pluck_desc(pl330);
/* If the DMAC pool is empty, alloc new */
if (!desc) {
if (!add_desc(pdmac, GFP_ATOMIC, 1))
if (!add_desc(pl330, GFP_ATOMIC, 1))
return NULL;
/* Try again */
desc = pluck_desc(pdmac);
desc = pluck_desc(pl330);
if (!desc) {
dev_err(pch->dmac->pif.dev,
dev_err(pch->dmac->ddma.dev,
"%s:%d ALERT!\n", __func__, __LINE__);
return NULL;
}
......@@ -2463,7 +2385,7 @@ static struct dma_pl330_desc *pl330_get_desc(struct dma_pl330_chan *pch)
async_tx_ack(&desc->txd);
desc->req.peri = peri_id ? pch->chan.chan_id : 0;
desc->rqcfg.pcfg = &pch->dmac->pif.pcfg;
desc->rqcfg.pcfg = &pch->dmac->pcfg;
dma_async_tx_descriptor_init(&desc->txd, &pch->chan);
......@@ -2485,7 +2407,7 @@ __pl330_prep_dma_memcpy(struct dma_pl330_chan *pch, dma_addr_t dst,
struct dma_pl330_desc *desc = pl330_get_desc(pch);
if (!desc) {
dev_err(pch->dmac->pif.dev, "%s:%d Unable to fetch desc\n",
dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n",
__func__, __LINE__);
return NULL;
}
......@@ -2509,11 +2431,11 @@ __pl330_prep_dma_memcpy(struct dma_pl330_chan *pch, dma_addr_t dst,
static inline int get_burst_len(struct dma_pl330_desc *desc, size_t len)
{
struct dma_pl330_chan *pch = desc->pchan;
struct pl330_info *pi = &pch->dmac->pif;
struct pl330_dmac *pl330 = pch->dmac;
int burst_len;
burst_len = pi->pcfg.data_bus_width / 8;
burst_len *= pi->pcfg.data_buf_dep;
burst_len = pl330->pcfg.data_bus_width / 8;
burst_len *= pl330->pcfg.data_buf_dep;
burst_len >>= desc->rqcfg.brst_size;
/* src/dst_burst_len can't be more than 16 */
......@@ -2536,7 +2458,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
{
struct dma_pl330_desc *desc = NULL, *first = NULL;
struct dma_pl330_chan *pch = to_pchan(chan);
struct dma_pl330_dmac *pdmac = pch->dmac;
struct pl330_dmac *pl330 = pch->dmac;
unsigned int i;
dma_addr_t dst;
dma_addr_t src;
......@@ -2545,7 +2467,7 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
return NULL;
if (!is_slave_direction(direction)) {
dev_err(pch->dmac->pif.dev, "%s:%d Invalid dma direction\n",
dev_err(pch->dmac->ddma.dev, "%s:%d Invalid dma direction\n",
__func__, __LINE__);
return NULL;
}
......@@ -2553,23 +2475,23 @@ static struct dma_async_tx_descriptor *pl330_prep_dma_cyclic(
for (i = 0; i < len / period_len; i++) {
desc = pl330_get_desc(pch);
if (!desc) {
dev_err(pch->dmac->pif.dev, "%s:%d Unable to fetch desc\n",
dev_err(pch->dmac->ddma.dev, "%s:%d Unable to fetch desc\n",
__func__, __LINE__);
if (!first)
return NULL;
spin_lock_irqsave(&pdmac->pool_lock, flags);
spin_lock_irqsave(&pl330->pool_lock, flags);
while (!list_empty(&first->node)) {
desc = list_entry(first->node.next,
struct dma_pl330_desc, node);
list_move_tail(&desc->node, &pdmac->desc_pool);
list_move_tail(&desc->node, &pl330->desc_pool);
}
list_move_tail(&first->node, &pdmac->desc_pool);
list_move_tail(&first->node, &pl330->desc_pool);
spin_unlock_irqrestore(&pdmac->pool_lock, flags);
spin_unlock_irqrestore(&pl330->pool_lock, flags);
return NULL;
}
......@@ -2619,14 +2541,12 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
{
struct dma_pl330_desc *desc;
struct dma_pl330_chan *pch = to_pchan(chan);
struct pl330_info *pi;
struct pl330_dmac *pl330 = pch->dmac;
int burst;
if (unlikely(!pch || !len))
return NULL;
pi = &pch->dmac->pif;
desc = __pl330_prep_dma_memcpy(pch, dst, src, len);
if (!desc)
return NULL;
......@@ -2636,7 +2556,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
desc->req.rqtype = DMA_MEM_TO_MEM;
/* Select max possible burst size */
burst = pi->pcfg.data_bus_width / 8;
burst = pl330->pcfg.data_bus_width / 8;
while (burst > 1) {
if (!(len % burst))
......@@ -2655,7 +2575,7 @@ pl330_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dst,
return &desc->txd;
}
static void __pl330_giveback_desc(struct dma_pl330_dmac *pdmac,
static void __pl330_giveback_desc(struct pl330_dmac *pl330,
struct dma_pl330_desc *first)
{
unsigned long flags;
......@@ -2664,17 +2584,17 @@ static void __pl330_giveback_desc(struct dma_pl330_dmac *pdmac,
if (!first)
return;
spin_lock_irqsave(&pdmac->pool_lock, flags);
spin_lock_irqsave(&pl330->pool_lock, flags);
while (!list_empty(&first->node)) {
desc = list_entry(first->node.next,
struct dma_pl330_desc, node);
list_move_tail(&desc->node, &pdmac->desc_pool);
list_move_tail(&desc->node, &pl330->desc_pool);
}
list_move_tail(&first->node, &pdmac->desc_pool);
list_move_tail(&first->node, &pl330->desc_pool);
spin_unlock_irqrestore(&pdmac->pool_lock, flags);
spin_unlock_irqrestore(&pl330->pool_lock, flags);
}
static struct dma_async_tx_descriptor *
......@@ -2699,12 +2619,12 @@ pl330_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
desc = pl330_get_desc(pch);
if (!desc) {
struct dma_pl330_dmac *pdmac = pch->dmac;
struct pl330_dmac *pl330 = pch->dmac;
dev_err(pch->dmac->pif.dev,
dev_err(pch->dmac->ddma.dev,
"%s:%d Unable to fetch desc\n",
__func__, __LINE__);
__pl330_giveback_desc(pdmac, first);
__pl330_giveback_desc(pl330, first);
return NULL;
}
......@@ -2768,9 +2688,9 @@ static int
pl330_probe(struct amba_device *adev, const struct amba_id *id)
{
struct dma_pl330_platdata *pdat;
struct dma_pl330_dmac *pdmac;
struct pl330_config *pcfg;
struct pl330_dmac *pl330;
struct dma_pl330_chan *pch, *_p;
struct pl330_info *pi;
struct dma_device *pd;
struct resource *res;
int i, ret, irq;
......@@ -2783,30 +2703,27 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
return ret;
/* Allocate a new DMAC and its Channels */
pdmac = devm_kzalloc(&adev->dev, sizeof(*pdmac), GFP_KERNEL);
if (!pdmac) {
pl330 = devm_kzalloc(&adev->dev, sizeof(*pl330), GFP_KERNEL);
if (!pl330) {
dev_err(&adev->dev, "unable to allocate mem\n");
return -ENOMEM;
}
pi = &pdmac->pif;
pi->dev = &adev->dev;
pi->pl330_data = NULL;
pi->mcbufsz = pdat ? pdat->mcbuf_sz : 0;
pl330->mcbufsz = pdat ? pdat->mcbuf_sz : 0;
res = &adev->res;
pi->base = devm_ioremap_resource(&adev->dev, res);
if (IS_ERR(pi->base))
return PTR_ERR(pi->base);
pl330->base = devm_ioremap_resource(&adev->dev, res);
if (IS_ERR(pl330->base))
return PTR_ERR(pl330->base);
amba_set_drvdata(adev, pdmac);
amba_set_drvdata(adev, pl330);
for (i = 0; i < AMBA_NR_IRQS; i++) {
irq = adev->irq[i];
if (irq) {
ret = devm_request_irq(&adev->dev, irq,
pl330_irq_handler, 0,
dev_name(&adev->dev), pi);
dev_name(&adev->dev), pl330);
if (ret)
return ret;
} else {
......@@ -2814,38 +2731,40 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
}
}
pi->pcfg.periph_id = adev->periphid;
ret = pl330_add(pi);
pcfg = &pl330->pcfg;
pcfg->periph_id = adev->periphid;
ret = pl330_add(pl330);
if (ret)
return ret;
INIT_LIST_HEAD(&pdmac->desc_pool);
spin_lock_init(&pdmac->pool_lock);
INIT_LIST_HEAD(&pl330->desc_pool);
spin_lock_init(&pl330->pool_lock);
/* Create a descriptor pool of default size */
if (!add_desc(pdmac, GFP_KERNEL, NR_DEFAULT_DESC))
if (!add_desc(pl330, GFP_KERNEL, NR_DEFAULT_DESC))
dev_warn(&adev->dev, "unable to allocate desc\n");
pd = &pdmac->ddma;
pd = &pl330->ddma;
INIT_LIST_HEAD(&pd->channels);
/* Initialize channel parameters */
if (pdat)
num_chan = max_t(int, pdat->nr_valid_peri, pi->pcfg.num_chan);
num_chan = max_t(int, pdat->nr_valid_peri, pcfg->num_chan);
else
num_chan = max_t(int, pi->pcfg.num_peri, pi->pcfg.num_chan);
num_chan = max_t(int, pcfg->num_peri, pcfg->num_chan);
pdmac->num_peripherals = num_chan;
pl330->num_peripherals = num_chan;
pdmac->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL);
if (!pdmac->peripherals) {
pl330->peripherals = kzalloc(num_chan * sizeof(*pch), GFP_KERNEL);
if (!pl330->peripherals) {
ret = -ENOMEM;
dev_err(&adev->dev, "unable to allocate pdmac->peripherals\n");
dev_err(&adev->dev, "unable to allocate pl330->peripherals\n");
goto probe_err2;
}
for (i = 0; i < num_chan; i++) {
pch = &pdmac->peripherals[i];
pch = &pl330->peripherals[i];
if (!adev->dev.of_node)
pch->chan.private = pdat ? &pdat->peri_id[i] : NULL;
else
......@@ -2857,7 +2776,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
spin_lock_init(&pch->lock);
pch->thread = NULL;
pch->chan.device = pd;
pch->dmac = pdmac;
pch->dmac = pl330;
/* Add the channel to the DMAC list */
list_add_tail(&pch->chan.device_node, &pd->channels);
......@@ -2868,7 +2787,7 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
pd->cap_mask = pdat->cap_mask;
} else {
dma_cap_set(DMA_MEMCPY, pd->cap_mask);
if (pi->pcfg.num_peri) {
if (pcfg->num_peri) {
dma_cap_set(DMA_SLAVE, pd->cap_mask);
dma_cap_set(DMA_CYCLIC, pd->cap_mask);
dma_cap_set(DMA_PRIVATE, pd->cap_mask);
......@@ -2893,14 +2812,14 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
if (adev->dev.of_node) {
ret = of_dma_controller_register(adev->dev.of_node,
of_dma_pl330_xlate, pdmac);
of_dma_pl330_xlate, pl330);
if (ret) {
dev_err(&adev->dev,
"unable to register DMA to the generic DT DMA helpers\n");
}
}
adev->dev.dma_parms = &pdmac->dma_parms;
adev->dev.dma_parms = &pl330->dma_parms;
/*
* This is the limit for transfers with a buswidth of 1, larger
......@@ -2915,14 +2834,13 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
"Loaded driver for PL330 DMAC-%d\n", adev->periphid);
dev_info(&adev->dev,
"\tDBUFF-%ux%ubytes Num_Chans-%u Num_Peri-%u Num_Events-%u\n",
pi->pcfg.data_buf_dep,
pi->pcfg.data_bus_width / 8, pi->pcfg.num_chan,
pi->pcfg.num_peri, pi->pcfg.num_events);
pcfg->data_buf_dep, pcfg->data_bus_width / 8, pcfg->num_chan,
pcfg->num_peri, pcfg->num_events);
return 0;
probe_err3:
/* Idle the DMAC */
list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
list_for_each_entry_safe(pch, _p, &pl330->ddma.channels,
chan.device_node) {
/* Remove the channel */
......@@ -2933,27 +2851,23 @@ pl330_probe(struct amba_device *adev, const struct amba_id *id)
pl330_free_chan_resources(&pch->chan);
}
probe_err2:
pl330_del(pi);
pl330_del(pl330);
return ret;
}
static int pl330_remove(struct amba_device *adev)
{
struct dma_pl330_dmac *pdmac = amba_get_drvdata(adev);
struct pl330_dmac *pl330 = amba_get_drvdata(adev);
struct dma_pl330_chan *pch, *_p;
struct pl330_info *pi;
if (!pdmac)
return 0;
if (adev->dev.of_node)
of_dma_controller_free(adev->dev.of_node);
dma_async_device_unregister(&pdmac->ddma);
dma_async_device_unregister(&pl330->ddma);
/* Idle the DMAC */
list_for_each_entry_safe(pch, _p, &pdmac->ddma.channels,
list_for_each_entry_safe(pch, _p, &pl330->ddma.channels,
chan.device_node) {
/* Remove the channel */
......@@ -2964,9 +2878,7 @@ static int pl330_remove(struct amba_device *adev)
pl330_free_chan_resources(&pch->chan);
}
pi = &pdmac->pif;
pl330_del(pi);
pl330_del(pl330);
return 0;
}
......
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