Commit f7d7f866 authored by David Woodhouse's avatar David Woodhouse Committed by Ingo Molnar

x86, intel-iommu: fix X2APIC && !ACPI build failure

This build failure:

| drivers/pci/dmar.c:47: error: expected ‘=’, ‘,’, ‘;’, ‘asm’ or ‘__attribute__’ before ‘dmar_tbl_size’
| drivers/pci/dmar.c:62: warning: ‘struct acpi_dmar_device_scope’ declared inside parameter list
| drivers/pci/dmar.c:62: warning: its scope is only this definition or declaration, which is probably not what you want

Triggers due to this commit:

  d0b03bd1: x2apic/intr-remap: decouple interrupt remapping from x2apic

Which exposed a pre-existing but dormant fragility of the 'select X86_X2APIC'
it moved around and turned that fragility into a build failure.

Replace it with a proper 'depends on' construct.
Signed-off-by: default avatarDavid Woodhouse <David.Woodhouse@intel.com>
LKML-Reference: <1239084280.22733.404.camel@macbook.infradead.org>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent d508afb4
...@@ -252,17 +252,13 @@ config SMP ...@@ -252,17 +252,13 @@ config SMP
config X86_X2APIC config X86_X2APIC
bool "Support x2apic" bool "Support x2apic"
depends on X86_LOCAL_APIC && X86_64 depends on X86_LOCAL_APIC && X86_64 && INTR_REMAP
select INTR_REMAP
---help--- ---help---
This enables x2apic support on CPUs that have this feature. This enables x2apic support on CPUs that have this feature.
This allows 32-bit apic IDs (so it can support very large systems), This allows 32-bit apic IDs (so it can support very large systems),
and accesses the local apic via MSRs not via mmio. and accesses the local apic via MSRs not via mmio.
( On certain CPU models you may need to enable INTR_REMAP too,
to get functional x2apic mode. )
If you don't know what to do here, say N. If you don't know what to do here, say N.
config SPARSE_IRQ config SPARSE_IRQ
......
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