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Kirill Smelkov
linux
Commits
f7e2224a
Commit
f7e2224a
authored
Apr 22, 2004
by
Len Brown
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[ACPI] allow IRQ2 to be used in ACPI/IOAPIC mode
http://bugzilla.kernel.org/show_bug.cgi?id=2564
parent
0482a634
Changes
2
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2 changed files
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12 additions
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20 deletions
+12
-20
arch/i386/kernel/io_apic.c
arch/i386/kernel/io_apic.c
+6
-10
arch/x86_64/kernel/io_apic.c
arch/x86_64/kernel/io_apic.c
+6
-10
No files found.
arch/i386/kernel/io_apic.c
View file @
f7e2224a
...
@@ -2259,18 +2259,10 @@ static inline void check_timer(void)
...
@@ -2259,18 +2259,10 @@ static inline void check_timer(void)
/*
/*
*
*
* IRQ's that are handled by the
old PIC in all cases:
* IRQ's that are handled by the
PIC in the MPS IOAPIC case.
* - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ.
* - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ.
* Linux doesn't really care, as it's not actually used
* Linux doesn't really care, as it's not actually used
* for any interrupt handling anyway.
* for any interrupt handling anyway.
* - There used to be IRQ13 here as well, but all
* MPS-compliant must not use it for FPU coupling and we
* want to use exception 16 anyway. And there are
* systems who connect it to an I/O APIC for other uses.
* Thus we don't mark it special any longer.
*
* Additionally, something is definitely wrong with irq9
* on PIIX4 boards.
*/
*/
#define PIC_IRQS (1 << PIC_CASCADE_IR)
#define PIC_IRQS (1 << PIC_CASCADE_IR)
...
@@ -2278,7 +2270,11 @@ void __init setup_IO_APIC(void)
...
@@ -2278,7 +2270,11 @@ void __init setup_IO_APIC(void)
{
{
enable_IO_APIC
();
enable_IO_APIC
();
if
(
acpi_ioapic
)
io_apic_irqs
=
~
0
;
/* all IRQs go through IOAPIC */
else
io_apic_irqs
=
~
PIC_IRQS
;
io_apic_irqs
=
~
PIC_IRQS
;
printk
(
"ENABLING IO-APIC IRQs
\n
"
);
printk
(
"ENABLING IO-APIC IRQs
\n
"
);
/*
/*
...
...
arch/x86_64/kernel/io_apic.c
View file @
f7e2224a
...
@@ -1726,18 +1726,10 @@ static inline void check_timer(void)
...
@@ -1726,18 +1726,10 @@ static inline void check_timer(void)
/*
/*
*
*
* IRQ's that are handled by the
old PIC in all cases:
* IRQ's that are handled by the
PIC in the MPS IOAPIC case.
* - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ.
* - IRQ2 is the cascade IRQ, and cannot be a io-apic IRQ.
* Linux doesn't really care, as it's not actually used
* Linux doesn't really care, as it's not actually used
* for any interrupt handling anyway.
* for any interrupt handling anyway.
* - There used to be IRQ13 here as well, but all
* MPS-compliant must not use it for FPU coupling and we
* want to use exception 16 anyway. And there are
* systems who connect it to an I/O APIC for other uses.
* Thus we don't mark it special any longer.
*
* Additionally, something is definitely wrong with irq9
* on PIIX4 boards.
*/
*/
#define PIC_IRQS (1<<2)
#define PIC_IRQS (1<<2)
...
@@ -1745,7 +1737,11 @@ void __init setup_IO_APIC(void)
...
@@ -1745,7 +1737,11 @@ void __init setup_IO_APIC(void)
{
{
enable_IO_APIC
();
enable_IO_APIC
();
if
(
acpi_ioapic
)
io_apic_irqs
=
~
0
;
/* all IRQs go through IOAPIC */
else
io_apic_irqs
=
~
PIC_IRQS
;
io_apic_irqs
=
~
PIC_IRQS
;
printk
(
"ENABLING IO-APIC IRQs
\n
"
);
printk
(
"ENABLING IO-APIC IRQs
\n
"
);
/*
/*
...
...
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